Andre Przywara dee0203500 ARM: dts: suniv: f1c100s: add LRADC node
The Allwinner F1C100s series of SoCs contain a LRADC (aka. KEYADC)
compatible to the version in other SoCs.
The manual doesn't mention the ratio of the input voltage that is used,
but comparing actual measurements with the values in the register
suggests that it is 3/4 of Vref.

Add the DT node describing the base address and interrupt. As in the
older SoCs, there is no explicit reset or clock gate, also there is a
dedicated, non-multiplexed pin, so need for more properties.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Link: https://lore.kernel.org/r/20221107005433.11079-8-andre.przywara@arm.com
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
2022-11-16 19:38:28 +01:00
2022-09-28 09:02:20 +02:00
2022-09-28 09:02:20 +02:00
2022-09-28 09:02:20 +02:00
2022-10-16 15:36:24 -07:00

Linux kernel
============

There are several guides for kernel developers and users. These guides can
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In order to build the documentation, use ``make htmldocs`` or
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several of them using the Restructured Text markup notation.

Please read the Documentation/process/changes.rst file, as it contains the
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