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The dedicated display PHYs reset to a power state that blocks S0ix,
increasing idle system power. After a system reset (cold boot,
S3/4/5, warm reset) if a dedicated PHY is not being brought up
shortly, use these steps to move the PHY to the lowest power state
to save power.
1. Follow the PLL Enable Sequence, using any valid frequency such
as DP 1.62 GHz. This brings lanes out of reset and enables the
PLL to allow powerdown to be moved to the Disable state.
2. Follow PLL Disable Sequence. This moves powerdown to the Disable
state and disables the PLL.
v2: Rename WA function to more descriptive (Jani)
For PTL, only port A needs this wa
Add helpers to check presence of C10 phy and pll enabling (Imre)
v3: Rename wa function (Imre)
Check return value of C10 pll tables readout (Imre)
Use PLL request to check pll enabling (Imre)
v4: Move intel_cx0_pll_is_enabled() right after
intel_cx0_pll_disable() (Imre)
Add drm_WARN_ON() if C10 state cannot be calculated from
the tables (Imre)
v5: Add debug message on PLL enabling (Imre)
Add check for intel_encoder_is_dig_port() (Imre)
Signed-off-by: Mika Kahola <mika.kahola@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20250218100019.740556-3-mika.kahola@intel.com
Linux kernel
============
There are several guides for kernel developers and users. These guides can
be rendered in a number of formats, like HTML and PDF. Please read
Documentation/admin-guide/README.rst first.
In order to build the documentation, use ``make htmldocs`` or
``make pdfdocs``. The formatted documentation can also be read online at:
https://www.kernel.org/doc/html/latest/
There are various text files in the Documentation/ subdirectory,
several of them using the reStructuredText markup notation.
Please read the Documentation/process/changes.rst file, as it contains the
requirements for building and running the kernel, and information about
the problems which may result by upgrading your kernel.