Hyungwon Hwang 26269af95a drm/exynos: dsi: rename pll_clk to sclk_clk ...

This patch renames pll_clk to sclk_clk. The clock referenced by pll_clk
is actually not the pll input clock for dsi. The pll input clock comes
from the board's oscillator directly. But for the backward
compatibility, the old clock name "pll_clk" is also OK.

Signed-off-by: Hyungwon Hwang <human.hwang@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>

2015-06-22 20:05:00 +09:00

..

bindings

drm/exynos: dsi: rename pll_clk to sclk_clk

2015-06-22 20:05:00 +09:00

00-INDEX

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booting-without-of.txt

MIPS: BMIPS: Document the firmware->kernel DTB interface

2015-04-01 17:21:38 +02:00

changesets.txt

of: Transactional DT support.

2014-07-23 17:29:15 -06:00

dynamic-resolution-notes.txt

of: Introduce Device Tree resolve support.

2014-10-04 21:24:26 +01:00

of_unittest.txt

Documentation: rename of_selftest.txt to of_unittest.txt

2015-03-25 00:50:53 -05:00

overlay-notes.txt

Documentation: devicetree: Fix double words in Doumentation/devicetree

2015-01-28 15:13:11 -07:00

todo.txt

of: Eliminate of_allnodes list

2014-11-04 13:29:38 +00:00

usage-model.txt

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