mirror of
git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
synced 2025-09-04 20:19:47 +08:00
8b7ab8eb52
2068 Commits
| Author | SHA1 | Message | Date | |
|---|---|---|---|---|
Jacky Chou
|
4dc5f7b2c0 |
dt-bindings: clock: ast2600: Add reset definitions for MAC1 and MAC2
Add ASPEED_RESET_MAC1 and ASPEED_RESET_MAC2 reset definitions to the ast2600-clock binding header. These are required for proper reset control of the MAC1 and MAC2 ethernet controllers on the AST2600 SoC. Signed-off-by: Jacky Chou <jacky_chou@aspeedtech.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Acked-by: Stephen Boyd <sboyd@kernel.org> Link: https://patch.msgid.link/20250709070809.2560688-3-jacky_chou@aspeedtech.com Signed-off-by: Jakub Kicinski <kuba@kernel.org> |
||
|
Linus Torvalds
|
ec71f661a5 |
soc: devicetree updates for 6.16
There are 11 newly supported SoCs, but these are all either new
variants of existing designs, or straig reuses of the existing
chip in a new package:
- RK3562 is a new chip based on the old Cortex-A53 core, apparently
a low-cost version of the Cortex-A55 based RK3568/RK3566.
- NXP i.MX94 is a minor variation of i.MX93/i.MX95 with a different
set of on-chip peripherals.
- Renesas RZ/V2N (R9A09G056) is a new member of the larger RZ/V2 family
- Amlogic S6/S7/S7D
- Samsung Exynos7870 is an older chip similar to Exynos7885
- WonderMedia wm8950 is a minor variation on the wm8850 chip
- Amlogic s805y is almost idential to s805x
- Allwinner A523 is similar to A527 and T527
- Qualcomm MSM8926 is a variant of MSM8226
- Qualcomm Snapdragon X1P42100 is related to R1E80100
There are also 65 boards, including reference designs for the chips
above, this includes
- 12 new boards based on TI K3 series chips, most of them from
Toradex
- 10 devices using Rockchips RK35xx and PX30 chips
- 2 phones and 2 laptops based on Qualcomm Snapdragon designs
- 10 NXP i.MX8/i.MX9 boards, mostly for embedded/industrial uses
- 3 Samsung Galaxy phones based on Exynos7870
- 5 Allwinner based boards using a variety of ARMv8 chips
- 9 32-bit machines, each based on a different SoC family
Aside from the new hardware, there is the usual set of cleanups and
newly added hardware support on existing machines, for a total of 965
devicetree changesets.
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Merge tag 'soc-dt-6.16' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull SoC devicetree updates from Arnd Bergmann:
"There are 11 newly supported SoCs, but these are all either new
variants of existing designs, or straight reuses of the existing chip
in a new package:
- RK3562 is a new chip based on the old Cortex-A53 core, apparently a
low-cost version of the Cortex-A55 based RK3568/RK3566.
- NXP i.MX94 is a minor variation of i.MX93/i.MX95 with a different
set of on-chip peripherals.
- Renesas RZ/V2N (R9A09G056) is a new member of the larger RZ/V2
family
- Amlogic S6/S7/S7D
- Samsung Exynos7870 is an older chip similar to Exynos7885
- WonderMedia wm8950 is a minor variation on the wm8850 chip
- Amlogic s805y is almost idential to s805x
- Allwinner A523 is similar to A527 and T527
- Qualcomm MSM8926 is a variant of MSM8226
- Qualcomm Snapdragon X1P42100 is related to R1E80100
There are also 65 boards, including reference designs for the chips
above, this includes
- 12 new boards based on TI K3 series chips, most of them from
Toradex
- 10 devices using Rockchips RK35xx and PX30 chips
- 2 phones and 2 laptops based on Qualcomm Snapdragon designs
- 10 NXP i.MX8/i.MX9 boards, mostly for embedded/industrial uses
- 3 Samsung Galaxy phones based on Exynos7870
- 5 Allwinner based boards using a variety of ARMv8 chips
- 9 32-bit machines, each based on a different SoC family
Aside from the new hardware, there is the usual set of cleanups and
newly added hardware support on existing machines, for a total of 965
devicetree changesets"
* tag 'soc-dt-6.16' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (956 commits)
MAINTAINERS, mailmap: update Sven Peter's email address
arm64: dts: renesas: rzg3e-smarc-som: Reduce I2C2 clock frequency
arm64: dts: nuvoton: Add pinctrl
ARM: dts: samsung: sp5v210-aries: Align wifi node name with bindings
arm64: dts: blaize-blzp1600: Enable GPIO support
dt-bindings: clock: socfpga: convert to yaml
arm64: dts: rockchip: move rk3562 pinctrl node outside the soc node
arm64: dts: rockchip: fix rk3562 pcie unit addresses
arm64: dts: rockchip: move rk3528 pinctrl node outside the soc node
arm64: dts: rockchip: remove a double-empty line from rk3576 core dtsi
arm64: dts: rockchip: move rk3576 pinctrl node outside the soc node
arm64: dts: rockchip: fix rk3576 pcie unit addresses
arm64: dts: rockchip: Drop assigned-clock* from cpu nodes on rk3588
arm64: dts: rockchip: Add missing SFC power-domains to rk3576
Revert "arm64: dts: mediatek: mt8390-genio-common: Add firmware-name for scp0"
arm64: dts: mediatek: mt8188: Address binding warnings for MDP3 nodes
arm64: dts: mt6359: Rename RTC node to match binding expectations
arm64: dts: mt8365-evk: Add goodix touchscreen support
arm64: dts: mediatek: mt8188: Add missing #reset-cells property
arm64: dts: airoha: en7581: Add PCIe nodes to EN7581 SoC evaluation board
...
|
||
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Stephen Boyd
|
63bfd78aae
|
Merge branches 'clk-amlogic', 'clk-allwinner', 'clk-rockchip' and 'clk-qcom' into clk-next
* clk-amlogic: clk: meson: Do not enable by default during compile testing clk: meson-g12a: add missing fclk_div2 to spicc * clk-allwinner: clk: sunxi-ng: ccu: add Display Engine 3.3 (DE33) support dt-bindings: allwinner: add H616 DE33 clock binding clk: sunxi-ng: h616: Add LVDS reset for LCD TCON dt-bindings: clock: sun50i-h616-ccu: Add LVDS reset clk: sunxi: Do not enable by default during compile testing clk: sunxi-ng: Do not enable by default during compile testing * clk-rockchip: clk: rockchip: rk3528: add slab.h header include clk: rockchip: rk3576: add missing slab.h include clk: rockchip: rename gate-grf clk file clk: rockchip: rename branch_muxgrf to branch_grf_mux clk: rockchip: Pass NULL as reg pointer when registering GRF MMC clocks clk: rockchip: rk3036: mark ddrphy as critical clk: rockchip: rk3036: fix implementation of usb480m clock mux dt-bindings: clock: rk3036: add SCLK_USB480M clock-id clk: rockchip: rk3528: Add SD/SDIO tuning clocks in GRF region clk: rockchip: Support MMC clocks in GRF region dt-bindings: clock: Add GRF clock definition for RK3528 clk: rockchip: add GATE_GRFs for SAI MCLKOUT to rk3576 clk: rockchip: introduce GRF gates clk: rockchip: introduce auxiliary GRFs dt-bindings: clock: rk3576: add IOC gated clocks clk: rockchip: rk3568: Add PLL rate for 33.3MHz clk: rockchip: Drop empty init callback for rk3588 PLL type clk: rockchip: rk3588: Add PLL rate for 1500 MHz * clk-qcom: clk: qcom: gcc-x1e80100: Set FORCE MEM CORE for UFS clocks clk: qcom: gcc: Set FORCE_MEM_CORE_ON for gcc_ufs_axi_clk for 8650/8750 clk: qcom: rpmh: make clkaN optional clk: qcom: Add support for Camera Clock Controller on QCS8300 clk: qcom: gcc-msm8939: Fix mclk0 & mclk1 for 24 MHz dt-bindings: clock: add SM6350 QCOM video clock bindings clk: qcom: gpucc-sm6350: Add *_wait_val values for GDSCs clk: qcom: gcc-sm6350: Add *_wait_val values for GDSCs clk: qcom: dispcc-sm6350: Add *_wait_val values for GDSCs clk: qcom: camcc-sm6350: Add *_wait_val values for GDSCs clk: qcom: Fix missing error check for dev_pm_domain_attach() |
||
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Stephen Boyd
|
3e515fc860
|
Merge branches 'clk-socfpga', 'clk-sophgo', 'clk-thead' and 'clk-samsung' into clk-next
* clk-socfpga: clk: socfpga: stratix10: Optimize local variables clk: socfpga: clk-pll: Optimize local variables * clk-sophgo: clk: sophgo: Add clock controller support for SG2044 SoC clk: sophgo: Add PLL clock controller support for SG2044 SoC dt-bindings: clock: sophgo: add clock controller for SG2044 dt-bindings: soc: sophgo: Add SG2044 top syscon device clk: sophgo: Add support for newly added precise compatible dt-bindings: clock: sophgo: Use precise compatible for CV1800 series SoC * clk-thead: clk: thead: Add clock support for VO subsystem in T-HEAD TH1520 SoC dt-bindings: clock: thead: Add TH1520 VO clock controller * clk-samsung: clk: samsung: correct clock summary for hsi1 block clk: samsung: exynosautov920: Fix incorrect CLKS_NR_CPUCL0 definition clk: samsung: exynosautov920: add cpucl1/2 clock support dt-bindings: clock: exynosautov920: add cpucl1/2 clock definitions clk: samsung: exynosautov920: add cpucl0 clock support dt-bindings: clock: exynosautov920: add cpucl0 clock definitions clk: samsung: Use samsung CCF common function |
||
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Stephen Boyd
|
7459da16c9
|
Merge branches 'clk-bindings', 'clk-renesas', 'clk-spacemit' and 'clk-cleanup' into clk-next
* clk-bindings: dt-bindings: clock: Drop st,stm32h7-rcc.txt dt-bindings: clock: convert bcm2835-aux-clock to yaml dt-bindings: clock: Drop maxim,max77686.txt dt-bindings: clock: convert vf610-clock.txt to yaml format * clk-renesas: (26 commits) clk: renesas: r9a09g047: Add XSPI clock/reset clk: renesas: r9a09g047: Add support for xspi mux and divider dt-bindings: clock: renesas,r9a09g047-cpg: Add XSPI and GBETH PTP core clocks clk: renesas: Use str_on_off() helper clk: renesas: r9a09g057: Add clock and reset entries for USB2 dt-bindings: clock: renesas,r9a09g057-cpg: Add USB2 PHY and GBETH PTP core clocks clk: renesas: rzv2h: Use both CLK_ON and CLK_MON bits for clock state validation clk: renesas: rzv2h: Use str_on_off() helper in rzv2h_mod_clock_endisable() clk: renesas: rzv2h: Support static dividers without RMW clk: renesas: rzv2h: Add macro for defining static dividers clk: renesas: rzv2h: Add support for static mux clocks clk: renesas: r9a09g047: Add clock and reset entries for GE3D clk: renesas: rzv2h: Fix a typo clk: renesas: rzv2h: Add support for RZ/V2N SoC clk: renesas: rzv2h: Sort compatible list based on SoC part number dt-bindings: pinctrl: renesas: Document RZ/V2N SoC dt-bindings: clock: renesas: Document RZ/V2N SoC CPG dt-bindings: soc: renesas: Document SYS for RZ/V2N SoC dt-bindings: soc: renesas: Document Renesas RZ/V2N SoC variants and EVK clk: renesas: rzv2h: Simplify rzv2h_cpg_assert()/rzv2h_cpg_deassert() ... * clk-spacemit: clk: spacemit: k1: Add TWSI8 bus and function clocks clk: spacemit: Add clock support for SpacemiT K1 SoC dt-bindings: clock: spacemit: Add spacemit,k1-pll dt-bindings: soc: spacemit: Add spacemit,k1-syscon * clk-cleanup: clk: test: Forward-declare struct of_phandle_args in kunit/clk.h clk: davinci: Use of_get_available_child_by_name() clk: bcm: rpi: Add NULL check in raspberrypi_clk_register() clk: bcm: rpi: Drop module alias clk: bcm: kona: Remove unused scaled_div_build |
||
|
Arnd Bergmann
|
b9e82beb37 |
New SoC the RK3562 (4xA53, Mali-G52) with one evaluation board.
New boards:
- Cobra and PP1516 from Theobroma-Systems (build around the PX30)
- Radxa Rock 5B+ (rk3588)
- Rockchip RK3399 industrial eval board
New peripherals:
- GMAC + SDMMC/SDIO on rk3528
- SAI + HDMI-audio on rk3576
Interesting general updates:
- move rk3528 i2c + uart aliases as requested
- rk3568 PCIe3 MSI to use GIC ITS
- update deprecated dwmac reset properties on some px30 boards
- updates for cypress usb hubs on some Theobroma boards
Binding taken with Greg's blessing
https://lore.kernel.org/all/2025051550-polish-prude-ed56@gregkh/
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Merge tag 'v6.16-rockchip-dts64-2' of https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into soc/dt
New SoC the RK3562 (4xA53, Mali-G52) with one evaluation board.
New boards:
- Cobra and PP1516 from Theobroma-Systems (build around the PX30)
- Radxa Rock 5B+ (rk3588)
- Rockchip RK3399 industrial eval board
New peripherals:
- GMAC + SDMMC/SDIO on rk3528
- SAI + HDMI-audio on rk3576
Interesting general updates:
- move rk3528 i2c + uart aliases as requested
- rk3568 PCIe3 MSI to use GIC ITS
- update deprecated dwmac reset properties on some px30 boards
- updates for cypress usb hubs on some Theobroma boards
Binding taken with Greg's blessing
https://lore.kernel.org/all/2025051550-polish-prude-ed56@gregkh/
* tag 'v6.16-rockchip-dts64-2' of https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: (35 commits)
arm64: dts: rockchip: Improve LED config for NanoPi R5S
arm64: dts: rockchip: add px30-pp1516 base dtsi and board variants
dt-bindings: arm: rockchip: add PX30-PP1516 boards from Theobroma Systems
arm64: dts: rockchip: add px30-cobra base dtsi and board variants
dt-bindings: arm: rockchip: add PX30-Cobra boards from Theobroma Systems
arm64: dts: rockchip: move reset to dedicated eth-phy node on ringneck
arm64: dts: rockchip: add basic mdio node to px30
arm64: dts: rockchip: disable unrouted USB controllers and PHY on RK3399 Puma with Haikou
arm64: dts: rockchip: disable unrouted USB controllers and PHY on RK3399 Puma
arm64: dts: rockchip: fix internal USB hub instability on RK3399 Puma
dt-bindings: usb: cypress,hx3: Add support for all variants
arm64: dts: rockchip: move rk3528 i2c+uart aliases to board files
arm64: dts: rockchip: drop wrong spdif clock from edp1 on rk3588
arm64: dts: rockchip: Add RK3562 evb2 devicetree
arm64: dts: rockchip: add core dtsi for RK3562 SoC
dt-bindings: arm: rockchip: Add rk3562 evb2 board
dt-bindings: soc: rockchip: Add rk3562 syscon compatibles
dt-bindings: rockchip: pmu: Add rk3562 compatible
arm64: dts: rockchip: Enable Ethernet controller on Radxa E20C
arm64: dts: rockchip: Add GMAC nodes for RK3528
...
Link: https://lore.kernel.org/r/3998939.iIbC2pHGDl@phil
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
||
|
Arnd Bergmann
|
38181494e4 |
STM32 DT for v6.16, round 1
Highlights:
----------
- MCU:
- Add low power timer on STM32F746
- Add STM32H747 High end MCU support. It embeds:
- dual-core (Cortex-M7 + Cortex-M4)
- up to 2 Mbytes flash
- 1 Mbyte of internal RAM
- Add STM32H747i-disco board support. Detailed information can be
found at:
https://www.st.com/en/evaluation-tools/stm32h747i-disco.html
- MPU:
- STM32MP13:
- Add VREFINT calibration support based on ADC.
- STMP32MP15:
- Add new Ultratronik Fly board support:
- based on STM32MP157C SoC
- 1GB of DDR3
- Several connections are available on this boards:
2*USB2.0, 1*USB2.0 MiniUSB, Debug UART, 1*UART, 1*USART,
SDcard, RJ45, ...
- STM32MP25:
- Add OCTOSPI support on STM32MP25 SoCs
- Add SPI NOR flash support on STM32MP257F-EV1 connected to OSPI1
- Add Low power timer TIMER (LPTIM) on STM32MP25 SoCs and use
LPTIM3 as low power broadcast timer on STM32MP257F-EV1.
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Merge tag 'stm32-dt-for-v6.16-1' of https://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into soc/dt
STM32 DT for v6.16, round 1
Highlights:
----------
- MCU:
- Add low power timer on STM32F746
- Add STM32H747 High end MCU support. It embeds:
- dual-core (Cortex-M7 + Cortex-M4)
- up to 2 Mbytes flash
- 1 Mbyte of internal RAM
- Add STM32H747i-disco board support. Detailed information can be
found at:
https://www.st.com/en/evaluation-tools/stm32h747i-disco.html
- MPU:
- STM32MP13:
- Add VREFINT calibration support based on ADC.
- STMP32MP15:
- Add new Ultratronik Fly board support:
- based on STM32MP157C SoC
- 1GB of DDR3
- Several connections are available on this boards:
2*USB2.0, 1*USB2.0 MiniUSB, Debug UART, 1*UART, 1*USART,
SDcard, RJ45, ...
- STM32MP25:
- Add OCTOSPI support on STM32MP25 SoCs
- Add SPI NOR flash support on STM32MP257F-EV1 connected to OSPI1
- Add Low power timer TIMER (LPTIM) on STM32MP25 SoCs and use
LPTIM3 as low power broadcast timer on STM32MP257F-EV1.
* tag 'stm32-dt-for-v6.16-1' of https://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: (22 commits)
ARM: dts: stm32: add initial support for stm32mp157-ultra-fly-sbc board
MAINTAINERS: Add entry for ULTRATRONIK BOARD SUPPORT
dt-bindings: arm: stm32: Document Ultratronik's Fly board DT binding
dt-bindings: vendor-prefixes: Add Ultratronik
arm64: dts: st: use lptimer3 as tick broadcast source on stm32mp257f-ev1
arm64: dts: st: add low-power timer nodes on stm32mp251
arm64: defconfig: enable STM32 LP timer clockevent driver
arm64: dts: st: Add SPI NOR flash support on stm32mp257f-ev1 board
arm64: dts: st: Add ospi port1 pinctrl entries in stm32mp25-pinctrl.dtsi
arm64: dts: st: Add OMM node on stm32mp251
ARM: dts: stm32: support STM32h747i-disco board
ARM: dts: stm32: add an extra pin map for USART1 on stm32h743
ARM: dts: stm32: add pin map for UART8 controller on stm32h743
ARM: dts: stm32: add uart8 node for stm32h743 MCU
dt-bindings: clock: stm32h7: rename USART{7,8}_CK to UART{7,8}_CK
ARM: stm32: add a new SoC - STM32H747
dt-bindings: arm: stm32: add compatible for stm32h747i-disco board
ARM: dts: stm32h7-pinctrl: add _a suffix to u[s]art_pins phandles
ARM: dts: st: stm32: Align wifi node name with bindings
ARM: dts: stm32: add low power timer on STM32F746
...
Link: https://lore.kernel.org/r/2f101efb-6d58-48d8-983a-57e30a34827c@foss.st.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
||
|
Arnd Bergmann
|
ba32d96e90 |
RISC-V SpacemiT DT changes for 6.16
- Add clock driver, fix for pinctrl/uart - Add gpio support, enable LED heartbeat -----BEGIN PGP SIGNATURE----- Version: GnuPG v2 iQKTBAABCgB9FiEEtbq4ycMbcRVnAiPcMarqR1lNu+0FAmgkEphfFIAAAAAALgAo aXNzdWVyLWZwckBub3RhdGlvbnMub3BlbnBncC5maWZ0aGhvcnNlbWFuLm5ldEI1 QkFCOEM5QzMxQjcxMTU2NzAyMjNEQzMxQUFFQTQ3NTk0REJCRUQACgkQMarqR1lN u+2A0Q//fwnp36zuiqqYoZ7N9iFmLYjJlM9UEU2FSZ0/RWxL/1Y7ZBNAUajf7e7p N124gpRM5BJMyA+vHEJH1t8WblKoxwt9fjbn9QlcDYnoq5NuHjLkxwfySe+2V5tW kZoPrSwgZ3ODKn/HL+/ghT4ckNV6V+al6yh9x3Cv70ZYZjSOzRwshIf7JJBjzp9X y89QfuqRVT1YMdzCnWTMb7OVFM1fbPP88jjUR43VRieW9ER/8oaaNQNxg9r3wDFZ V6yOIhI5i43jDZcCKZLJCH+WjcIjDj8zQTbIvZOdZuFOR8FPPK2f+zvJ77C2eT6f fG6iB/yAWMFGNPQ064wWev43Ppq7KDkt2/qzTecBJRg6/+x6ILQy9TElkazkJDb2 EYIiucWoPqNMjSL3BRohJ+d6fSaFHaujhP5MGBYPVA6drAIYlwFPhH2HfebECUt9 4Ip9yzdTJAlXhvzlfXL6KBSCft2LinKVHEFvaNJKaZ5V6E93GP+lNv4rkgRoF+Hz uZsMpE2ex7uAskhFT4DQF7VAKaUvLSBUDVM8La1wy3jJFEl+w7YsSxYRTk3bRYt1 bSUdxCDDR+sD26ceMpiILdEy9cDE91B+ypUF1pu3C4P0vYEDi5pdIiuZmaYuAuXm SSC7ymRy2Ao0TGOtycRInTRtGzFnk9DZKLk+HU8rDJOq3WGpjFg= =yMSa -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmguShMACgkQmmx57+YA GNkNvQ/9EIjYie44k9ZyGxjQHuht6IayZHxyQvNVEp/Ef9l/S3M1PUMexgeHLG+0 8z8eITaP+9zz0wYA0mdoFdh8kdvHkGDVh8cKFrAQmXb1DMk/scQVfOShwh7F4wb4 bTohJIq4pVh/Y/b7Yz9kuCKZFmqx5Wpfg+s5iw9vR4SZ7kRCYnhdbBBXo9dOAFN/ KoGPQf6Pw3pKGMrxRifYyvrhJYuDZER3U+oERA+Rr2pB5tRf1TRHSvHNY//gBmVh bwh09t49pqkMWY0iJoJe7syIRjSLwzZF5HIPZYW8f33r/HKYYrS6quTuq9X3hnGI WYwBUftxIW9EU0vFQ/U+vZZRbArYfuydvpuh1iaHSo3ZBeu9cHQKH4HFQg/oUoaG rgvRKBd0Zb+bChvkpTj6hPrFht9m1IYhoDnazD9hhKXXHVSZsENm/3jhpUmQdOfW vpzW6AWUKCM7+ScFqMyvzTvCnuBdZNGzS1L9SWMwv8k6vs5mhTuO1Zqzli2WDEae D1MNzonF5NR91K4ayYMOz+HOZzQ6cOzJHUADd7Zk/zh0BClS0h6M88Dqql0C68ww 3Oeao9Z1e9BhO7Ubzh+/YV3fRff+/U1UZnRpFQnnqzbVw8YmAbivltJj86R7ftVp HnW5S9NLUz+UonGAwRRWck78I4/pRG2EbyQvFofta0U7ILePDYM= =09rm -----END PGP SIGNATURE----- Merge tag 'spacemit-dt-for-6.16-1' of https://github.com/spacemit-com/linux into soc/dt RISC-V SpacemiT DT changes for 6.16 - Add clock driver, fix for pinctrl/uart - Add gpio support, enable LED heartbeat * tag 'spacemit-dt-for-6.16-1' of https://github.com/spacemit-com/linux: riscv: dts: spacemit: add gpio LED for system heartbeat riscv: dts: spacemit: add gpio support for K1 SoC riscv: dts: spacemit: Acquire clocks for UART riscv: dts: spacemit: Acquire clocks for pinctrl riscv: dts: spacemit: Add clock tree for SpacemiT K1 dt-bindings: clock: spacemit: Add spacemit,k1-pll dt-bindings: soc: spacemit: Add spacemit,k1-syscon Link: https://lore.kernel.org/r/20250514044841-GYA524674@gentoo Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
||
|
Dario Binacchi
|
ecab3c40fa |
dt-bindings: clock: stm32h7: rename USART{7,8}_CK to UART{7,8}_CK
As stated in the reference manual RM0433, the STM32H743 MCU has USART1/2/3/6, UART4/5/7/8, and LPUART1. The patches make all the clock macros for the serial ports consistent with the documentation. Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250427074404.3278732-5-dario.binacchi@amarulasolutions.com Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com> |
||
|
Konrad Dybcio
|
b887afb9b2 |
dt-bindings: clock: add SM6350 QCOM video clock bindings
Add device tree bindings for video clock controller for SM6350 SoCs. Signed-off-by: Konrad Dybcio <konradybcio@kernel.org> Co-developed-by: Luca Weiss <luca.weiss@fairphone.com> Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250324-sm6350-videocc-v2-2-cc22386433f4@fairphone.com Signed-off-by: Bjorn Andersson <andersson@kernel.org> |
||
|
Heiko Stuebner
|
6e06b641ca |
dt-bindings: clock: rk3036: add SCLK_USB480M clock-id
Contrary to how it is implemented right now, the usb480m clock is a controllable mux that can switch between the 24MHz oscillator and the clock output of the usb2phy. Add the needed clock-id to allow setting this mux from DT. Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/20250503202532.992033-2-heiko@sntech.de |
||
|
Geert Uytterhoeven
|
d4da08ea37 |
Renesas RZ/G3E XSPI and GBETH Core DT Binding Definitions
XSPI and Gigabit Ethernet PTP reference core clock DT binding definitions for the Renesas RZ/G3E (R9A09G047) SoC, shared by driver and DT source files. -----BEGIN PGP SIGNATURE----- iHUEABYKAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCaBz0aAAKCRCKwlD9ZEnx cFcSAPoC6UvKjSNjqSO7E7kvJalj0Me2ulS4W/ajYx425xz6vgEA0wna1n4fhs6j kucdgGvY3aOet2goBCdVSoRiP/rF/Qk= =d8LY -----END PGP SIGNATURE----- Merge tag 'renesas-r9a09g047-dt-binding-defs-tag3' into renesas-clk-for-v6.16 Renesas RZ/G3E XSPI and GBETH Core DT Binding Definitions XSPI and Gigabit Ethernet PTP reference core clock DT binding definitions for the Renesas RZ/G3E (R9A09G047) SoC, shared by driver and DT source files. |
||
|
Biju Das
|
f21923f3f4 |
dt-bindings: clock: renesas,r9a09g047-cpg: Add XSPI and GBETH PTP core clocks
Add definitions for XSPI core clock and Gigabit Ethernet PTP reference core clocks in the R9A09G047 CPG DT bindings header file. The clk_spi is modelled as a fixed divider clock with parent clk_spix2 and factor two as both parent and child share same gating bit. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/20250424081400.135028-2-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> |
||
|
Yao Zi
|
8a023e86f3 |
dt-bindings: clock: Add GRF clock definition for RK3528
These clocks are for SD/SDIO tuning purpose and come with registers in GRF syscon. Signed-off-by: Yao Zi <ziyao@disroot.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250506092206.46143-2-ziyao@disroot.org Signed-off-by: Heiko Stuebner <heiko@sntech.de> |
||
|
Michal Wilczynski
|
1b4bb451f3 |
dt-bindings: clock: thead: Add TH1520 VO clock controller
Add device tree bindings for the TH1520 Video Output (VO) subsystem clock controller. The VO sub-system manages clock gates for multimedia components including HDMI, MIPI, and GPU. Document the VIDEO_PLL requirements for the VO clock controller, which receives its input from the AP clock controller. The VIDEO_PLL is a Silicon Creations Sigma-Delta (integer) PLL typically running at 792 MHz with maximum FOUTVCO of 2376 MHz. This binding complements the existing AP sub-system clock controller which manages CPU, DPU, GMAC and TEE PLLs. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Michal Wilczynski <m.wilczynski@samsung.com> Reviewed-by: Drew Fustini <drew@pdp7.com> Signed-off-by: Drew Fustini <drew@pdp7.com> |
||
|
Inochi Amaoto
|
1a21590498 |
dt-bindings: clock: sophgo: add clock controller for SG2044
The clock controller on the SG2044 provides common clock function for all IPs on the SoC. This device requires PLL clock to function normally. Add definition for the clock controller of the SG2044 SoC. Reviewed-by: Chen Wang <unicorn_wang@outlook.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250418020325.421257-4-inochiama@gmail.com Signed-off-by: Inochi Amaoto <inochiama@gmail.com> Signed-off-by: Chen Wang <unicorn_wang@outlook.com> Signed-off-by: Chen Wang <wangchen20@iscas.ac.cn> |
||
|
Inochi Amaoto
|
e4b700d389 |
dt-bindings: soc: sophgo: Add SG2044 top syscon device
The SG2044 top syscon device provide PLL clock control and some other misc feature of the SoC. Add the compatible string for SG2044 top syscon device. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250418020325.421257-2-inochiama@gmail.com Signed-off-by: Inochi Amaoto <inochiama@gmail.com> Signed-off-by: Chen Wang <unicorn_wang@outlook.com> Signed-off-by: Chen Wang <wangchen20@iscas.ac.cn> |
||
|
Nicolas Frattaroli
|
4210f21c00 |
dt-bindings: clock: rk3576: add IOC gated clocks
Certain clocks on the RK3576 are additionally essentially "gated" behind some bit toggles in the IOC GRF range. Downstream ungates these by adding a separate clock driver that maps over the GRF range and leaks their implementation of this into the DT. Instead, define some new clock IDs for these, so that consumers of these types of clocks can properly articulate which clock they're using, so that we can then add them to the clock driver for SoCs that need them. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com> Link: https://lore.kernel.org/r/20250502-rk3576-sai-v3-1-376cef19dd7c@collabora.com Signed-off-by: Heiko Stuebner <heiko@sntech.de> |
||
|
Shin Son
|
3c50137aa4 |
dt-bindings: clock: exynosautov920: add cpucl1/2 clock definitions
Add cpucl1 and cpucl2 clock definitions. CPUCL1/2 refer to CPU Cluster 1 and CPU Cluster 2, which provide clock support for the CPUs on Exynosauto V920 SoC. Signed-off-by: Shin Son <shin.son@samsung.com> Link: https://lore.kernel.org/r/20250428113517.426987-2-shin.son@samsung.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> |
||
|
Shin Son
|
e2642509e3 |
dt-bindings: clock: exynosautov920: add cpucl0 clock definitions
Add cpucl0 clock definitions. CPUCL0 refers to CPU Cluster 0, which provide clock support for the CPUs on Exynosauto V920 SoC. Signed-off-by: Shin Son <shin.son@samsung.com> Link: https://lore.kernel.org/r/20250423044153.1288077-2-shin.son@samsung.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> |
||
|
Geert Uytterhoeven
|
4902413495 |
Renesas RZ/V2H USB2 and GBETH Clock DT Binding Definitions
USB2 and Gigabit Ethernet clock DT binding definitions for the Renesas RZ/V2H (R9A09G057) SoC, shared by driver and DT source files. -----BEGIN PGP SIGNATURE----- iHUEABYKAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCaAdjCgAKCRCKwlD9ZEnx cK1QAQDuLzdrClZHsBEZ1SjldM2XDPA9PjpYSErEilAtZ9XOTQEAjqatxMy3ue3W Zmp5l7KlRrVxa9qAZ9BEdQOCiSDY0Qs= =Kiju -----END PGP SIGNATURE----- Merge tag 'renesas-r9a09g057-dt-binding-defs-tag3' into renesas-clk-for-v6.16 Renesas RZ/V2H USB2 and GBETH Clock DT Binding Definitions USB2 and Gigabit Ethernet clock DT binding definitions for the Renesas RZ/V2H (R9A09G057) SoC, shared by driver and DT source files. |
||
|
Lad Prabhakar
|
ad227dab30 |
dt-bindings: clock: renesas,r9a09g057-cpg: Add USB2 PHY and GBETH PTP core clocks
Add definitions for USB2 PHY core clocks and Gigabit Ethernet PTP reference core clocks in the R9A09G057 CPG DT bindings header file. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/20250407165202.197570-8-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> |
||
|
Haylen Chu
|
8090804045
|
dt-bindings: clock: spacemit: Add spacemit,k1-pll
Add definition for the PLL found on SpacemiT K1 SoC, which takes the external 24MHz oscillator as input and generates clocks in various frequencies for the system. Signed-off-by: Haylen Chu <heylenay@4d2.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Alex Elder <elder@riscstar.com> Reviewed-by: Yixun Lan <dlan@gentoo.org> Link: https://lore.kernel.org/r/20250416135406.16284-3-heylenay@4d2.org Signed-off-by: Yixun Lan <dlan@gentoo.org> |
||
|
Haylen Chu
|
61e312a001
|
dt-bindings: soc: spacemit: Add spacemit,k1-syscon
Document APMU, MPMU and APBC syscons found on SpacemiT K1 SoC, which are capable of generating clock and reset signals. Additionally, APMU and MPMU manage power domains. Signed-off-by: Haylen Chu <heylenay@4d2.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Alex Elder <elder@riscstar.com> Reviewed-by: Yixun Lan <dlan@gentoo.org> Link: https://lore.kernel.org/r/20250416135406.16284-2-heylenay@4d2.org Signed-off-by: Yixun Lan <dlan@gentoo.org> |
||
|
Lad Prabhakar
|
c04269c022 |
dt-bindings: clock: renesas: Document RZ/V2N SoC CPG
Document the device tree bindings for the Renesas RZ/V2N (R9A09G056) SoC Clock Pulse Generator (CPG). Update `renesas,rzv2h-cpg.yaml` to include the compatible string for RZ/V2N SoC and adjust the title and description accordingly. Additionally, introduce `renesas,r9a09g056-cpg.h` to define core clock constants for the RZ/V2N SoC. Note the existing RZ/V2H(P) family-specific clock driver will be reused for this SoC. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/20250407191628.323613-7-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> |
||
|
Linus Torvalds
|
59c35416f4 |
Here's the pile of clk driver patches. The usual suspects^Wsilicon
vendors are all here, adding new SoC support and fixing existing code.
There are a few patches to the clk framework here as well. They've been
baking in linux-next for weeks so I'm hoping we don't have to revert
them. The disable OF node patch is probably the scariest one although it
seems unlikely that a system would be relying on a driver _not_ probing
because the clk never appeared, but you never know. Nothing looks out of
the ordinary on the driver side but that's because it's mostly a bunch
of data.
Core:
- Use dev_err_probe() in the clk registration path (Peering into the
crystal ball shows many patches that remove printks)
- Check for disabled OF nodes in of_clk_get_hw_from_clkspec()
New Drivers:
- Allwinner A523/T527 clk driver
- Qualcomm IPQ9574 NSS clk driver
- Qualcomm QCS8300 GPU and video clk drivers
- Qualcomm SDM429 RPM clks
- Qualcomm QCM6490 LPASS (low power audio) resets
- Samsung Exynos2200: driver for several clock controllers (Alive,
CMGP, HSI, PERIC/PERIS, TOP, UFS and VFS)
- Samsung Exynos7870: Driver for several clock controllers (Alive, MIF,
DISP AUD, FSYS, G3D, ISP, MFC and PERI)
- Rockchip rk3528 and rk3562 clk driver
Updates:
- Various fixes to SoC clk drivers for incorrect data, avoid touching
protected registers, etc.
- Additions for some missing clks in existing SoC clk drivers
- DT schema conversions from text to YAML
- Kconfig cleanups to allow drivers to be compiled on moar
architectures
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Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
Pull clk updates from Stephen Boyd:
"Here's the pile of clk driver patches. The usual suspects^Wsilicon
vendors are all here, adding new SoC support and fixing existing code.
There are a few patches to the clk framework here as well. They've
been baking in linux-next for weeks so I'm hoping we don't have to
revert them. The disable OF node patch is probably the scariest one
although it seems unlikely that a system would be relying on a driver
_not_ probing because the clk never appeared, but you never know.
Nothing looks out of the ordinary on the driver side but that's
because it's mostly a bunch of data.
Core:
- Use dev_err_probe() in the clk registration path (Peering into the
crystal ball shows many patches that remove printks)
- Check for disabled OF nodes in of_clk_get_hw_from_clkspec()
New Drivers:
- Allwinner A523/T527 clk driver
- Qualcomm IPQ9574 NSS clk driver
- Qualcomm QCS8300 GPU and video clk drivers
- Qualcomm SDM429 RPM clks
- Qualcomm QCM6490 LPASS (low power audio) resets
- Samsung Exynos2200: driver for several clock controllers (Alive,
CMGP, HSI, PERIC/PERIS, TOP, UFS and VFS)
- Samsung Exynos7870: Driver for several clock controllers (Alive,
MIF, DISP AUD, FSYS, G3D, ISP, MFC and PERI)
- Rockchip rk3528 and rk3562 clk driver
Updates:
- Various fixes to SoC clk drivers for incorrect data, avoid touching
protected registers, etc.
- Additions for some missing clks in existing SoC clk drivers
- DT schema conversions from text to YAML
- Kconfig cleanups to allow drivers to be compiled on moar
architectures"
* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (125 commits)
clk: qcom: Add NSS clock Controller driver for IPQ9574
clk: qcom: gcc-ipq9574: Add support for gpll0_out_aux clock
dt-bindings: clock: Add ipq9574 NSSCC clock and reset definitions
dt-bindings: clock: gcc-ipq9574: Add definition for GPLL0_OUT_AUX
clk: qcom: gcc-msm8953: fix stuck venus0_core0 clock
clk: qcom: mmcc-sdm660: fix stuck video_subcore0 clock
dt-bindings: clock: qcom,x1e80100-camcc: Fix the list of required-opps
clk: amlogic: a1: fix a typo
clk: amlogic: gxbb: drop non existing 32k clock parent
clk: amlogic: gxbb: drop incorrect flag on 32k clock
clk: amlogic: g12b: fix cluster A parent data
clk: amlogic: g12a: fix mmc A peripheral clock
dt-bindings: clocks: atmel,at91rm9200-pmc: add missing compatibles
dt-bindings: reset: fix double id on rk3562-cru reset ids
drivers: clk: qcom: ipq5424: fix the freq table of sdcc1_apps clock
clk: qcom: lpassaudiocc-sc7280: Add support for LPASS resets for QCM6490
dt-bindings: clock: qcom: Add compatible for QCM6490 boards
clk: qcom: gdsc: Update the status poll timeout for GDSC
clk: qcom: gdsc: Set retain_ff before moving to HW CTRL
clk: davinci: remove support for da830
...
|
||
|
Linus Torvalds
|
1c83601b8f |
Added support for multi-cluster configuration
Added quirks for enabling multi-cluster mode on EyeQ6 Added DTS clocks for ralink Cleanup realtek DTS Other cleanups and fixes -----BEGIN PGP SIGNATURE----- iQJOBAABCAA4FiEEbt46xwy6kEcDOXoUeZbBVTGwZHAFAmfnxUoaHHRzYm9nZW5k QGFscGhhLmZyYW5rZW4uZGUACgkQeZbBVTGwZHD/MA//aMzae6TL2S/vKVx/QCwL I+Lww1O8CvCgRBiBVkVoS5eXeqt8NzyCwicFT5LmLxI+lw5wFrgBO6rbcq2NxLHY q9I8dz5qTpGomT7TWoL8t97ZGxpLSYIqx4cqvvQrIhczWCGsvgAtep03sstlX6iT RouZ6JIxRh0xSRuloT1947C6dH204t/kuFDJ4uCXrbkmstXhQ/+dip8s7/XMaXHk sU1cjPV8Tpxlwv8X9SR39IKVk7LoHW/92w/J1se5CosHnSlJ7IjaUuO3Y7bp3xdw SLYBxge/JfIcXh0YURS2hhlsdls9e55Zrg+ACn8DTDfFy6kq6v5ZsUEsnWpCKfQl IymQ5246EJgtk8hNGe77qjiMnxbkNeM4v8DB7UVZHPxsGBrUlSNYZL2fSMdXkd2Y JlobF9QgyXf+aZyLtn1g3B6yn8Ajd2L5rmq4fXKbRhMfMno/nnsi8nZ24OPp3lkY KoWkXPwNZfxE7xOnBjk9BleijIHoC7w291j4h4/QMfzJqlkpRDJAKGOTBMOUYrER B5PYGPjTWD8Os0xzp/PGkTMagoKcxzX7LYfAL0iEQ3ixgtwHtni/gUGJItBK6XTK 1KQZaXDcr5EAa6IcGjaNTrpaSQK5duZThPRiUE6fqboHFtB7JmLJZmsFE0BZbcEe mJ21gTa4hFQOQ3J5YZoytEI= =hUDw -----END PGP SIGNATURE----- Merge tag 'mips_6.15' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux Pull MIPS updates from Thomas Bogendoerfer: - Add support for multi-cluster configuration - Add quirks for enabling multi-cluster mode on EyeQ6 - Add DTS clocks for ralink - Cleanup realtek DTS - Other cleanups and fixes * tag 'mips_6.15' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux: (35 commits) MIPS: config: omega2+, vocore2: enable CLK_MTMIPS arch: mips: defconfig: Drop obsolete CONFIG_NET_CLS_TCINDEX MIPS: cm: Fix warning if MIPS_CM is disabled MIPS: Fix Macro name MIPS: ds1287: Match ds1287_set_base_clock() function types MIPS: cevt-ds1287: Add missing ds1287.h include MIPS: dec: Declare which_prom() as static MIPS: Loongson2ef: Replace deprecated strncpy() with strscpy() mips: dts: ralink: mt7628a: update system controller node and its consumers mips: dts: ralink: mt7620a: update system controller node and its consumers mips: dts: ralink: rt3883: update system controller node and its consumers mips: dts: ralink: rt3050: update system controller node and its consumers mips: dts: ralink: rt2880: update system controller node and its consumers dt-bindings: clock: add clock definitions for Ralink SoCs MIPS: Use arch specific syscall name match function mips: dts: realtek: Add restart to Cisco SG220-26P mips: dts: realtek: Add RTL838x SoC peripherals mips: dts: realtek: Replace uart clock property mips: dts: realtek: Correct uart interrupt-parent mips: dts: realtek: Add SoC IRQ node for RTL838x ... |
||
|
Linus Torvalds
|
0c86b42439 |
drm for 6.15-rc1
uapi:
- add mediatek tiled fourcc
- add support for notifying userspace on device wedged
new driver:
- appletbdrm: support for Apple Touchbar displays on m1/m2
- nova-core: skeleton rust driver to develop nova inside off
firmware:
- add some rust firmware pieces
rust:
- add 'LocalModule' type alias
component:
- add helper to query bound status
fbdev:
- fbtft: remove access to page->index
media:
- cec: tda998x: import driver from drm
dma-buf:
- add fast path for single fence merging
tests:
- fix lockdep warnings
atomic:
- allow full modeset on connector changes
- clarify semantics of allow_modeset and drm_atomic_helper_check
- async-flip: support on arbitary planes
- writeback: fix UAF
- Document atomic-state history
format-helper:
- support ARGB8888 to ARGB4444 conversions
buddy:
- fix multi-root cleanup
ci:
- update IGT
dp:
- support extended wake timeout
- mst: fix RAD to string conversion
- increase DPCD eDP control CAP size to 5 bytes
- add DPCD eDP v1.5 definition
- add helpers for LTTPR transparent mode
panic:
- encode QR code according to Fido 2.2
scheduler:
- add parameter struct for init
- improve job peek/pop operations
- optimise drm_sched_job struct layout
ttm:
- refactor pool allocation
- add helpers for TTM shrinker
panel-orientation:
- add a bunch of new quirks
panel:
- convert panels to multi-style functions
- edp: Add support for B140UAN04.4, BOE NV140FHM-NZ, CSW MNB601LS1-3,
LG LP079QX1-SP0V, MNE007QS3-7, STA 116QHD024002, Starry 116KHD024006,
Lenovo T14s Gen6 Snapdragon
- himax-hx83102: Add support for CSOT PNA957QT1-1, Kingdisplay
kd110n11-51ie, Starry 2082109qfh040022-50e
- visionox-r66451: use multi-style MIPI-DSI functions
- raydium-rm67200: Add driver for Raydium RM67200
- simple: Add support for BOE AV123Z7M-N17, BOE AV123Z7M-N17
- sony-td4353-jdi: Use MIPI-DSI multi-func interface
- summit: Add driver for Apple Summit display panel
- visionox-rm692e5: Add driver for Visionox RM692E5
bridge:
- pass full atomic state to various callbacks
- adv7511: Report correct capabilities
- it6505: Fix HDCP V compare
- snd65dsi86: fix device IDs
- nwl-dsi: set bridge type
- ti-sn65si83: add error recovery and set bridge type
- synopsys: add HDMI audio support
xe:
- support device-wedged event
- add mmap support for PCI memory barrier
- perf pmu integration and expose per-engien activity
- add EU stall sampling support
- GPU SVM and Xe SVM implementation
- use TTM shrinker
- add survivability mode to allow the driver to do
firmware updates in critical failure states
- PXP HWDRM support for MTL and LNL
- expose package/vram temps over hwmon
- enable DP tunneling
- drop mmio_ext abstraction
- Reject BO evcition if BO is bound to current VM
- Xe suballocator improvements
- re-use display vmas when possible
- add GuC Buffer Cache abstraction
- PCI ID update for Panther Lake and Battlemage
- Enable SRIOV for Panther Lake
- Refactor VRAM manager location
i915:
- enable extends wake timeout
- support device-wedged event
- Enable DP 128b/132b SST DSC
- FBC dirty rectangle support for display version 30+
- convert i915/xe to drm client setup
- Compute HDMI PLLS for rates not in fixed tables
- Allow DSB usage when PSR is enabled on LNL+
- Enable panel replay without full modeset
- Enable async flips with compressed buffers on ICL+
- support luminance based brightness via DPCD for eDP
- enable VRR enable/disable without full modeset
- allow GuC SLPC default strategies on MTL+ for performance
- lots of display refactoring in move to struct intel_display
amdgpu:
- add device wedged event
- support async page flips on overlay planes
- enable broadcast RGB drm property
- add info ioctl for virt mode
- OEM i2c support for RGB lights
- GC 11.5.2 + 11.5.3 support
- SDMA 6.1.3 support
- NBIO 7.9.1 + 7.11.2 support
- MMHUB 1.8.1 + 3.3.2 support
- DCN 3.6.0 support
- Add dynamic workload profile switching for GC 10-12
- support larger VBIOS sizes
- Mark gttsize parameters as deprecated
- Initial JPEG queue resset support
amdkfd:
- add KFD per process flags for setting precision
- sync pasid values between KGD and KFD
- improve GTT/VRAM handling for APUs
- fix user queue validation on GC7/8
- SDMA queue reset support
raedeon:
- rs400 hyperz fix
i2c:
- td998x: drop platform_data, split driver into media and bridge
ast:
- transmitter chip detection refactoring
- vbios display mode refactoring
- astdp: fix connection status and filter unsupported modes
- cursor handling refactoring
imagination:
- check job dependencies with sched helper
ivpu:
- improve command queue handling
- use workqueue for IRQ handling
- add support HW fault injection
- locking fixes
mgag200:
- add support for G200eH5
msm:
- dpu: add concurrent writeback support for DPU 10.x+
- use LTTPR helpers
- GPU:
- Fix obscure GMU suspend failure
- Expose syncobj timeline support
- Extend GPU devcoredump with pagetable info
- a623 support
- Fix a6xx gen1/gen2 indexed-register blocks in gpu snapshot / devcoredump
- Display:
- Add cpu-cfg interconnect paths on SM8560 and SM8650
- Introduce KMS OMMU fault handler, causing devcoredump snapshot
- Fixed error pointer dereference in msm_kms_init_aspace()
- DPU:
- Fix mode_changing handling
- Add writeback support on SM6150 (QCS615)
- Fix DSC programming in 1:1:1 topology
- Reworked hardware resource allocation, moving it to the CRTC code
- Enabled support for Concurrent WriteBack (CWB) on SM8650
- Enabled CDM blocks on all relevant platforms
- Reworked debugfs interface for BW/clocks debugging
- Clear perf params before calculating bw
- Support YUV formats on writeback
- Fixed double inclusion
- Fixed writeback in YUV formats when using cloned output, Dropped
wb2_formats_rgb
- Corrected dpu_crtc_check_mode_changed and struct dpu_encoder_virt
kerneldocs
- Fixed uninitialized variable in dpu_crtc_kickoff_clone_mode()
- DSI:
- DSC-related fixes
- Rework clock programming
- DSI PHY:
- Fix 7nm (and lower) PHY programming
- Add proper DT schema definitions for DSI PHY clocks
- HDMI:
- Rework the driver, enabling the use of the HDMI Connector framework
- Bindings:
- Added eDP PHY on SA8775P
nouveau:
- move drm_slave_encoder interface into driver
- nvkm: refactor GSP RPC
- use LTTPR helpers
mediatek:
- HDMI fixup and refinement
- add MT8188 dsc compatible
- MT8365 SoC support
panthor:
- Expose sizes of intenral BOs via fdinfo
- Fix race between reset and suspend
- Improve locking
qaic:
- Add support for AIC200
renesas:
- Fix limits in DT bindings
rockchip:
- support rk3562-mali
- rk3576: Add HDMI support
- vop2: Add new display modes on RK3588 HDMI0 up to 4K
- Don't change HDMI reference clock rate
- Fix DT bindings
- analogix_dp: add eDP support
- fix shutodnw
solomon:
- Set SPI device table to silence warnings
- Fix pixel and scanline encoding
v3d:
- handle clock
vc4:
- Use drm_exec
- Use dma-resv for wait-BO ioctl
- Remove seqno infrastructure
virtgpu:
- Support partial mappings of GEM objects
- Reserve VGA resources during initialization
- Fix UAF in virtgpu_dma_buf_free_obj()
- Add panic support
vkms:
- Switch to a managed modesetting pipeline
- Add support for ARGB8888
- fix UAf
xlnx:
- Set correct DMA segment size
- use mutex guards
- Fix error handling
- Fix docs
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Merge tag 'drm-next-2025-03-28' of https://gitlab.freedesktop.org/drm/kernel
Pull drm updates from Dave Airlie:
"Outside of drm there are some rust patches from Danilo who maintains
that area in here, and some pieces for drm header check tests.
The major things in here are a new driver supporting the touchbar
displays on M1/M2, the nova-core stub driver which is just the vehicle
for adding rust abstractions and start developing a real driver inside
of.
xe adds support for SVM with a non-driver specific SVM core
abstraction that will hopefully be useful for other drivers, along
with support for shrinking for TTM devices. I'm sure xe and AMD
support new devices, but the pipeline depth on these things is hard to
know what they end up being in the marketplace!
uapi:
- add mediatek tiled fourcc
- add support for notifying userspace on device wedged
new driver:
- appletbdrm: support for Apple Touchbar displays on m1/m2
- nova-core: skeleton rust driver to develop nova inside off
firmware:
- add some rust firmware pieces
rust:
- add 'LocalModule' type alias
component:
- add helper to query bound status
fbdev:
- fbtft: remove access to page->index
media:
- cec: tda998x: import driver from drm
dma-buf:
- add fast path for single fence merging
tests:
- fix lockdep warnings
atomic:
- allow full modeset on connector changes
- clarify semantics of allow_modeset and drm_atomic_helper_check
- async-flip: support on arbitary planes
- writeback: fix UAF
- Document atomic-state history
format-helper:
- support ARGB8888 to ARGB4444 conversions
buddy:
- fix multi-root cleanup
ci:
- update IGT
dp:
- support extended wake timeout
- mst: fix RAD to string conversion
- increase DPCD eDP control CAP size to 5 bytes
- add DPCD eDP v1.5 definition
- add helpers for LTTPR transparent mode
panic:
- encode QR code according to Fido 2.2
scheduler:
- add parameter struct for init
- improve job peek/pop operations
- optimise drm_sched_job struct layout
ttm:
- refactor pool allocation
- add helpers for TTM shrinker
panel-orientation:
- add a bunch of new quirks
panel:
- convert panels to multi-style functions
- edp: Add support for B140UAN04.4, BOE NV140FHM-NZ, CSW MNB601LS1-3,
LG LP079QX1-SP0V, MNE007QS3-7, STA 116QHD024002, Starry
116KHD024006, Lenovo T14s Gen6 Snapdragon
- himax-hx83102: Add support for CSOT PNA957QT1-1, Kingdisplay
kd110n11-51ie, Starry 2082109qfh040022-50e
- visionox-r66451: use multi-style MIPI-DSI functions
- raydium-rm67200: Add driver for Raydium RM67200
- simple: Add support for BOE AV123Z7M-N17, BOE AV123Z7M-N17
- sony-td4353-jdi: Use MIPI-DSI multi-func interface
- summit: Add driver for Apple Summit display panel
- visionox-rm692e5: Add driver for Visionox RM692E5
bridge:
- pass full atomic state to various callbacks
- adv7511: Report correct capabilities
- it6505: Fix HDCP V compare
- snd65dsi86: fix device IDs
- nwl-dsi: set bridge type
- ti-sn65si83: add error recovery and set bridge type
- synopsys: add HDMI audio support
xe:
- support device-wedged event
- add mmap support for PCI memory barrier
- perf pmu integration and expose per-engien activity
- add EU stall sampling support
- GPU SVM and Xe SVM implementation
- use TTM shrinker
- add survivability mode to allow the driver to do firmware updates
in critical failure states
- PXP HWDRM support for MTL and LNL
- expose package/vram temps over hwmon
- enable DP tunneling
- drop mmio_ext abstraction
- Reject BO evcition if BO is bound to current VM
- Xe suballocator improvements
- re-use display vmas when possible
- add GuC Buffer Cache abstraction
- PCI ID update for Panther Lake and Battlemage
- Enable SRIOV for Panther Lake
- Refactor VRAM manager location
i915:
- enable extends wake timeout
- support device-wedged event
- Enable DP 128b/132b SST DSC
- FBC dirty rectangle support for display version 30+
- convert i915/xe to drm client setup
- Compute HDMI PLLS for rates not in fixed tables
- Allow DSB usage when PSR is enabled on LNL+
- Enable panel replay without full modeset
- Enable async flips with compressed buffers on ICL+
- support luminance based brightness via DPCD for eDP
- enable VRR enable/disable without full modeset
- allow GuC SLPC default strategies on MTL+ for performance
- lots of display refactoring in move to struct intel_display
amdgpu:
- add device wedged event
- support async page flips on overlay planes
- enable broadcast RGB drm property
- add info ioctl for virt mode
- OEM i2c support for RGB lights
- GC 11.5.2 + 11.5.3 support
- SDMA 6.1.3 support
- NBIO 7.9.1 + 7.11.2 support
- MMHUB 1.8.1 + 3.3.2 support
- DCN 3.6.0 support
- Add dynamic workload profile switching for GC 10-12
- support larger VBIOS sizes
- Mark gttsize parameters as deprecated
- Initial JPEG queue resset support
amdkfd:
- add KFD per process flags for setting precision
- sync pasid values between KGD and KFD
- improve GTT/VRAM handling for APUs
- fix user queue validation on GC7/8
- SDMA queue reset support
raedeon:
- rs400 hyperz fix
i2c:
- td998x: drop platform_data, split driver into media and bridge
ast:
- transmitter chip detection refactoring
- vbios display mode refactoring
- astdp: fix connection status and filter unsupported modes
- cursor handling refactoring
imagination:
- check job dependencies with sched helper
ivpu:
- improve command queue handling
- use workqueue for IRQ handling
- add support HW fault injection
- locking fixes
mgag200:
- add support for G200eH5
msm:
- dpu: add concurrent writeback support for DPU 10.x+
- use LTTPR helpers
- GPU:
- Fix obscure GMU suspend failure
- Expose syncobj timeline support
- Extend GPU devcoredump with pagetable info
- a623 support
- Fix a6xx gen1/gen2 indexed-register blocks in gpu snapshot /
devcoredump
- Display:
- Add cpu-cfg interconnect paths on SM8560 and SM8650
- Introduce KMS OMMU fault handler, causing devcoredump snapshot
- Fixed error pointer dereference in msm_kms_init_aspace()
- DPU:
- Fix mode_changing handling
- Add writeback support on SM6150 (QCS615)
- Fix DSC programming in 1:1:1 topology
- Reworked hardware resource allocation, moving it to the CRTC code
- Enabled support for Concurrent WriteBack (CWB) on SM8650
- Enabled CDM blocks on all relevant platforms
- Reworked debugfs interface for BW/clocks debugging
- Clear perf params before calculating bw
- Support YUV formats on writeback
- Fixed double inclusion
- Fixed writeback in YUV formats when using cloned output, Dropped
wb2_formats_rgb
- Corrected dpu_crtc_check_mode_changed and struct dpu_encoder_virt
kerneldocs
- Fixed uninitialized variable in dpu_crtc_kickoff_clone_mode()
- DSI:
- DSC-related fixes
- Rework clock programming
- DSI PHY:
- Fix 7nm (and lower) PHY programming
- Add proper DT schema definitions for DSI PHY clocks
- HDMI:
- Rework the driver, enabling the use of the HDMI Connector
framework
- Bindings:
- Added eDP PHY on SA8775P
nouveau:
- move drm_slave_encoder interface into driver
- nvkm: refactor GSP RPC
- use LTTPR helpers
mediatek:
- HDMI fixup and refinement
- add MT8188 dsc compatible
- MT8365 SoC support
panthor:
- Expose sizes of intenral BOs via fdinfo
- Fix race between reset and suspend
- Improve locking
qaic:
- Add support for AIC200
renesas:
- Fix limits in DT bindings
rockchip:
- support rk3562-mali
- rk3576: Add HDMI support
- vop2: Add new display modes on RK3588 HDMI0 up to 4K
- Don't change HDMI reference clock rate
- Fix DT bindings
- analogix_dp: add eDP support
- fix shutodnw
solomon:
- Set SPI device table to silence warnings
- Fix pixel and scanline encoding
v3d:
- handle clock
vc4:
- Use drm_exec
- Use dma-resv for wait-BO ioctl
- Remove seqno infrastructure
virtgpu:
- Support partial mappings of GEM objects
- Reserve VGA resources during initialization
- Fix UAF in virtgpu_dma_buf_free_obj()
- Add panic support
vkms:
- Switch to a managed modesetting pipeline
- Add support for ARGB8888
- fix UAf
xlnx:
- Set correct DMA segment size
- use mutex guards
- Fix error handling
- Fix docs"
* tag 'drm-next-2025-03-28' of https://gitlab.freedesktop.org/drm/kernel: (1762 commits)
drm/amd/pm: Update feature list for smu_v13_0_6
drm/amdgpu: Add parameter documentation for amdgpu_sync_fence
drm/amdgpu/discovery: optionally use fw based ip discovery
drm/amdgpu/discovery: use specific ip_discovery.bin for legacy asics
drm/amdgpu/discovery: check ip_discovery fw file available
drm/amd/pm: Remove unnecessay UQ10 to UINT conversion
drm/amd/pm: Remove unnecessay UQ10 to UINT conversion
drm/amdgpu/sdma_v4_4_2: update VM flush implementation for SDMA
drm/amdgpu: Optimize VM invalidation engine allocation and synchronize GPU TLB flush
drm/amd/amdgpu: Increase max rings to enable SDMA page ring
drm/amdgpu: Decode deferred error type in gfx aca bank parser
drm/amdgpu/gfx11: Add Cleaner Shader Support for GFX11.5 GPUs
drm/amdgpu/mes: clean up SDMA HQD loop
drm/amdgpu/mes: enable compute pipes across all MEC
drm/amdgpu/mes: drop MES 10.x leftovers
drm/amdgpu/mes: optimize compute loop handling
drm/amdgpu/sdma: guilty tracking is per instance
drm/amdgpu/sdma: fix engine reset handling
drm/amdgpu: remove invalid usage of sched.ready
drm/amdgpu: add cleaner shader trace point
...
|
||
|
Stephen Boyd
|
e988adcb5d |
Merge branches 'clk-allwinner', 'clk-amlogic' and 'clk-qcom' into clk-next
* clk-allwinner: clk: sunxi-ng: add support for the A523/T527 PRCM CCU clk: sunxi-ng: a523: add reset lines clk: sunxi-ng: a523: add bus clock gates clk: sunxi-ng: a523: remaining mod clocks clk: sunxi-ng: a523: add USB mod clocks clk: sunxi-ng: a523: add interface mod clocks clk: sunxi-ng: a523: add system mod clocks clk: sunxi-ng: a523: add video mod clocks clk: sunxi-ng: a523: Add support for bus clocks clk: sunxi-ng: Add support for the A523/T527 CCU PLLs dt-bindings: clk: sunxi-ng: document two Allwinner A523 CCUs clk: sunxi-ng: Add support for update bit clk: sunxi-ng: mp: provide wrappers for setting feature flags clk: sunxi-ng: mp: introduce dual-divider clock clk: sunxi-ng: h616: Reparent GPU clock during frequency changes clk: sunxi-ng: h616: Add clock/reset for LCD TCON dt-bindings: clock: sun50i-h616-ccu: Add LCD TCON clk and reset * clk-amlogic: clk: amlogic: a1: fix a typo clk: amlogic: gxbb: drop non existing 32k clock parent clk: amlogic: gxbb: drop incorrect flag on 32k clock clk: amlogic: g12b: fix cluster A parent data clk: amlogic: g12a: fix mmc A peripheral clock * clk-qcom: (41 commits) clk: qcom: Add NSS clock Controller driver for IPQ9574 clk: qcom: gcc-ipq9574: Add support for gpll0_out_aux clock dt-bindings: clock: Add ipq9574 NSSCC clock and reset definitions dt-bindings: clock: gcc-ipq9574: Add definition for GPLL0_OUT_AUX clk: qcom: gcc-msm8953: fix stuck venus0_core0 clock clk: qcom: mmcc-sdm660: fix stuck video_subcore0 clock dt-bindings: clock: qcom,x1e80100-camcc: Fix the list of required-opps drivers: clk: qcom: ipq5424: fix the freq table of sdcc1_apps clock clk: qcom: lpassaudiocc-sc7280: Add support for LPASS resets for QCM6490 dt-bindings: clock: qcom: Add compatible for QCM6490 boards clk: qcom: gdsc: Update the status poll timeout for GDSC clk: qcom: gdsc: Set retain_ff before moving to HW CTRL clk: qcom: gcc-sm8650: Do not turn off USB GDSCs during gdsc_disable() clk: qcom: videocc: Constify 'struct qcom_cc_desc' clk: qcom: gpucc: Constify 'struct qcom_cc_desc' clk: qcom: dispcc: Constify 'struct qcom_cc_desc' clk: qcom: camcc: Constify 'struct qcom_cc_desc' dt-bindings: clock: qcom: sm8450-camcc: Remove qcom,x1e80100-camcc leftover clk: qcom: Add support for Video Clock Controller on QCS8300 clk: qcom: Add support for GPU Clock Controller on QCS8300 ... |
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|
Stephen Boyd
|
3ce2e14a5b |
Merge branches 'clk-rockchip', 'clk-samsung' and 'clk-imx' into clk-next
* clk-rockchip: dt-bindings: reset: fix double id on rk3562-cru reset ids clk: rockchip: Add clock controller for the RK3562 dt-bindings: clock: Add RK3562 cru clk: rockchip: rk3528: Add reset lookup table clk: rockchip: Add clock controller driver for RK3528 SoC clk: rockchip: Add PLL flag ROCKCHIP_PLL_FIXED_MODE dt-bindings: clock: Document clock and reset unit of RK3528 clk: rockchip: rk3328: fix wrong clk_ref_usb3otg parent clk: rockchip: rk3568: mark hclk_vi as critical clk: rockchip: rk3188: use PCLK_CIF0/1 clock IDs on RK3066 dt-bindings: clock: rk3188-common: add PCLK_CIF0/PCLK_CIF1 * clk-samsung: clk: samsung: Drop unused clk.h and of.h headers clk: samsung: Add missing mod_devicetable.h header clk: samsung: add initial exynos7870 clock driver clk: samsung: introduce Exynos2200 clock driver clk: samsung: clk-pll: add support for pll_4311 dt-bindings: clock: add clock definitions and documentation for exynos7870 CMU dt-bindings: clock: add Exynos2200 SoC clk: samsung: Fix UBSAN panic in samsung_clk_init() clk: samsung: Fix spelling mistake "stablization" -> "stabilization" clk: samsung: exynos990: Add CMU_PERIS block dt-bindings: clock: exynos990: Add CMU_PERIS block * clk-imx: clk: imx8mp: inform CCF of maximum frequency of clocks dt-bindings: clock: imx8m: document nominal/overdrive properties clk: clk-imx8mp-audiomix: fix dsp/ocram_a clock parents dt-bindings: clock: imx8mp: add axi clock |
||
|
Arnd Bergmann
|
c1abbe602b |
New peripheral the sdhci controller on rk3528. Enablement of hdmi and hdmi
audio on a number of additional boards. Better handling for scmi shared memory on rk3568 and a fix for the used SCMI clock ids on rk3576. As well as some fixes that were a bit late for trying to stuff them into 6.14 at this late stage of the cycle. -----BEGIN PGP SIGNATURE----- iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAmfVoEwQHGhlaWtvQHNu dGVjaC5kZQAKCRDzpnnJnNEdgUiYB/9DbZwmkqpkg5l/undLUC2NGKyhadwhCcnW h4112pr1ssUObE6YOtv0nfJWHyr8fHSt//R4CIOkPAuCWseLrxsu5F28tbwNbtCB FtHuLeAoa3cRdnwP0bdAif7Bzz8UfDlqwCYpPnU4p4tuoYx/xZ7CVOUXWuK1uLQ1 Fijj2sknWywRG3u6Z3tNFNJJH1ijvc6Tg1Xlog6Ace+BbOLtwP4z0wdckCj0Hi6N QHxNHP21m1s1W0eGQ6yEaUbnvxjT8n5iupCEqiAshtpiP3jWfhaGNzQ54vvqoLI7 EBIOXTFW760a6QuIVn44vlnSYKMgwu7KZRunl7FvcqJRWtEiAvlh =8a+w -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmfbLX8ACgkQYKtH/8kJ UiepnBAApGrFdlz6Un8RlTQINRt2eej2W8f3U6kJPwr0H8EuohJFyLS1w4akJcB5 Ug+9WWbF6lqFyV/tCVuR1dPxN7haI5Acua2rQ9jUPqH38GqUqMXq6HuEE6R6ML7Q tGsQnAy2vzQj6cVktypas5ZAEdnzauyKaggtgkUrzHsAL1eiy5V/M0qogfxSTpSs uXGixWTdoqUDXfCPVNOFSIa6az8vmZcEvBNdhPH+Zai98UUqf0ULEVPcgtzVV12I yGwPFQPkUsv3RlPx9vmgBIbWyH/C35bufcdkXpiuz8OUgsmx5DoJP8WubwdZUIeW hwXvIHoYNi7MrVu83HVilZzbb/VhbJAvuJPt9Dd1z8LZrxwnS4qMiDDJvgDT5ntn TBGRws/CFbz0GZAB6p2LmT0V7PcmfY/Yg7+NXajkNXHoBwZMclvP7w5sC24Q6Wv/ gHn11gS4FZBjNRO2ymygniRA42PL6/DvNvp+plzw+CR5usRXaNIq65rNWB1YrceG sRWYXTWiewf7iCTpaykkADYvCGkLfz320u+BDIo9G8Y3LSqmPQrfiM/kFqTmS5z+ Lu6B6yt3Oy92tpkKvKqFSVShA5LA2v0YSbrcz5n/lm5VGeDE0KG0CQ4VU89cVFqY T9keWPlmo8SG4LwjOiCJCQHxJEE1vzIt1z8Okv73dhpNYdS1yOE= =5tQQ -----END PGP SIGNATURE----- Merge tag 'v6.15-rockchip-dts64-2' of https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into soc/dt New peripheral the sdhci controller on rk3528. Enablement of hdmi and hdmi audio on a number of additional boards. Better handling for scmi shared memory on rk3568 and a fix for the used SCMI clock ids on rk3576. As well as some fixes that were a bit late for trying to stuff them into 6.14 at this late stage of the cycle. * tag 'v6.15-rockchip-dts64-2' of https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: arm64: dts: rockchip: remove ethm0_clk0_25m_out from Sige5 gmac0 arm64: dts: rockchip: Fix PWM pinctrl names arm64: dts: rockchip: fix RK3576 SCMI clock IDs dt-bindings: clock: rk3576: add SCMI clocks arm64: dts: rockchip: Fix pcie reset gpio on Orange Pi 5 Max arm64: dts: rockchip: Enable HDMI audio output for ArmSoM Sige7 arm64: dts: rockchip: Enable onboard eMMC on Radxa E20C arm64: dts: rockchip: Add SDHCI controller for RK3528 arm64: dts: rockchip: Remove bluetooth node from rock-3a arm64: dts: rockchip: Move rk356x scmi SHMEM to reserved memory arm64: dts: rockchip: Add AP6275P wireless support to ArmSoM Sige7 arm64: dts: rockchip: Enable HDMI audio outputs for Orange Pi 5 Plus arm64: dts: rockchip: Enable HDMI1 on Orange Pi 5 Plus arm64: dts: rockchip: Enable HDMI audio outputs for Orange Pi 5 Max arm64: dts: rockchip: Enable HDMI0 audio output for Orange Pi 5/5B Link: https://lore.kernel.org/r/23866869.6Emhk5qWAg@phil Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
||
|
Arnd Bergmann
|
32e0c5fe6e |
arm64: ZynqMP DT changes for 6.15
- Align clock nodes with DT binding - Add the first VN-X Versal NET board - Move constants out of DT bindings -----BEGIN PGP SIGNATURE----- iF0EABECAB0WIQQbPNTMvXmYlBPRwx7KSWXLKUoMIQUCZ9RALAAKCRDKSWXLKUoM IeXRAJ95wV22J/Jts1AE3fVkslkqbtHxqACeOSWK3xxlS1AR74JUT9LP9jXjGVk= =W+cs -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmfbLPAACgkQYKtH/8kJ UifMKA/+KZ7nV5IGf9oXcVo6RSz17ME2cLK5igTdBWNN5uUJE237F18zyIz96Cec fii0zGoDeCCxAauN6d47X31wl5Kw87rq1vAZpA250+Nmi3N2BirS9Y95IN/uBzAR y2uj9rBRTRW3cK4BtunNf/rVP04kgVGm63GHWG59b/b62bllp4mxo4L9/g+5o7bU Oskmb69FBiq4dm78M8IexNOJCFlWUj6i8GV6Zxft6UvXwPEGp6UaFetYsWKKu/cH zs8zhT2CbPxOujd2n5tJVP+SgFcQdg084LL+xVqz0kh22AQBEyTPe0lQqGI0OKIv NrCP6xOdQa+a0D8jNWBhGZuG5IcKmnrM6b11u9v8Sjj99C2pk1cKFQTKMEX9vN+t t8HYaC/jhnu+26GF1JhELbOWyyBIyGolzoHrxcNZJDDbgs6AhZBMpzGZ/FAIeV3P LJ0erImPGTp1yTN/uuLjWijBcqkfp9ukCyWj/PS57VAe8dFN2ZSAVlhlGBOgOF58 E7HHYJAHPTAwbJdTeKXdrlpl/rs4LBi9KsZyvGpoMZkoGkP53jF/qYMtmcl6Yq+B oFnhQAGoV2ogdX+/v3wvGcIf/v0nEMUwR6GlcooTgYxVhhIi1+FPV6df9FifatDT Qhmd08dYACNtfM/cwze3lbI6uKEqVNZOhLkkz+isDSI3JUH2mAA= =DdRO -----END PGP SIGNATURE----- Merge tag 'zynqmp-dt-for-6.14' of https://github.com/Xilinx/linux-xlnx into soc/dt arm64: ZynqMP DT changes for 6.15 - Align clock nodes with DT binding - Add the first VN-X Versal NET board - Move constants out of DT bindings * tag 'zynqmp-dt-for-6.14' of https://github.com/Xilinx/linux-xlnx: dt-bindings: xilinx: Deprecate header with firmware constants arm64: zynqmp: Use DT header for firmware constants arm64: versal-net: Add description for b2197-00 revA board dt-bindings: soc: Add new VN-X board description based on Versal NET arm64: zynqmp: add clock-output-names property in clock nodes Link: https://lore.kernel.org/r/CAHTX3d+u1VmxP4vm0peQS-ST7o0BuCpKUPRVCSLMfAAb=eV3Xg@mail.gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
||
|
Bjorn Andersson
|
0139f7d4e5 |
Merge branch '20250313110359.242491-1-quic_mmanikan@quicinc.com' into clk-for-6.15
Merge the IPQ9574 NSSCC binding through a topic branch, to allow them to also be merged and used in the DeviceTree source tree. |
||
|
Devi Priya
|
28300ecedc |
dt-bindings: clock: Add ipq9574 NSSCC clock and reset definitions
Add NSSCC clock and reset definitions for ipq9574. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Devi Priya <quic_devipriy@quicinc.com> Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@quicinc.com> Link: https://lore.kernel.org/r/20250313110359.242491-4-quic_mmanikan@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org> |
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Devi Priya
|
07986c5b36 |
dt-bindings: clock: gcc-ipq9574: Add definition for GPLL0_OUT_AUX
Add the definition for GPLL0_OUT_AUX clock. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Devi Priya <quic_devipriy@quicinc.com> Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@quicinc.com> Link: https://lore.kernel.org/r/20250313110359.242491-2-quic_mmanikan@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org> |
||
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Nicolas Frattaroli
|
28699ca6d9 |
dt-bindings: clock: rk3576: add SCMI clocks
Mainline Linux uses different clock IDs from both downstream and mainline TF-A, which both got them from downstream Linux. If we want to control clocks through SCMI, we'll need to know about these IDs. Add the relevant ones prefixed with SCMI_ to the header. Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com> Acked-by: "Rob Herring (Arm)" <robh@kernel.org> Link: https://lore.kernel.org/r/20250310-rk3576-scmi-clocks-v1-1-e165deb034e8@collabora.com Signed-off-by: Heiko Stuebner <heiko@sntech.de> |
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Arnd Bergmann
|
56beaf1444 |
Samsung DTS ARM64 changes for v6.15
1. Google GS101:
- Disable GSA core pinctrl because its registers are not available for
normal world.
- Add APM (Active Power Management) mailbox and the ACPM firmware nodes.
- Add new boards: Google Pixel 6 Pro (Raven).
- Enable framebuffer and reboot-mode.
2. Exynos990:
- Add PERIS clock controller, MCT timer
3. Exynos8895:
- Define all remaining serial engine (USI) and syscon nodes, add MMC.
- Enable microSD and touchsreen on Samsung Galaxy S8 (dreamlte).
4. ExynosAutov920: Add UFS and CPU cache information.
5. Various cleanups.
This includes two topic branches with DT bindings, which might be shared
with other trees depending on needs:
1. for-v6.15/samsung-clk-dt-bindings with Exynos990 clock controller
header constants.
2. for-v6.15/samsung-soc-dt-bindings with Exynos USI serial engines
header constants rework.
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Merge tag 'samsung-dt64-6.15' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into soc/dt
Samsung DTS ARM64 changes for v6.15
1. Google GS101:
- Disable GSA core pinctrl because its registers are not available for
normal world.
- Add APM (Active Power Management) mailbox and the ACPM firmware nodes.
- Add new boards: Google Pixel 6 Pro (Raven).
- Enable framebuffer and reboot-mode.
2. Exynos990:
- Add PERIS clock controller, MCT timer
3. Exynos8895:
- Define all remaining serial engine (USI) and syscon nodes, add MMC.
- Enable microSD and touchsreen on Samsung Galaxy S8 (dreamlte).
4. ExynosAutov920: Add UFS and CPU cache information.
5. Various cleanups.
This includes two topic branches with DT bindings, which might be shared
with other trees depending on needs:
1. for-v6.15/samsung-clk-dt-bindings with Exynos990 clock controller
header constants.
2. for-v6.15/samsung-soc-dt-bindings with Exynos USI serial engines
header constants rework.
* tag 'samsung-dt64-6.15' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: (25 commits)
arm64: dts: tesla: Change labels to lower-case
arm64: dts: exynos: gs101: Change labels to lower-case
arm64: dts: exynosautov920: add ufs phy for ExynosAutov920 SoC
arm64: dts: exynosautov920: add CPU cache information
arm64: dts: exynos: gs101: add ACPM protocol node
arm64: dts: exynos: gs101: add AP to APM mailbox node
arm64: dts: exynos: gs101: add SRAM node
arm64: dts: exynos: gs101: add reboot-mode support (SYSIP_DAT0)
arm64: dts: exynos: gs101: align poweroff writes with downstream
arm64: dts: exynos: gs101: drop explicit regmap from reboot nodes
arm64: dts: exynos8895: Rename PMU nodes to fixup sorting
arm64: dts: exynos8895-dreamlte: enable support for the touchscreen
arm64: dts: exynos8895-dreamlte: enable support for microSD storage
arm64: dts: exynos8895: add a node for mmc
arm64: dts: exynos8895: define all usi nodes
arm64: dts: exynos8895: add syscon nodes for peric0/1 and fsys0/1
arm64: dts: exynos990: Rename and sort PMU nodes
arm64: dts: exynos990: Add CMU_PERIS and MCT nodes
dt-bindings: soc: samsung: usi: add USIv1 and samsung,exynos8895-usi
dt-bindings: clock: exynos990: Add CMU_PERIS block
...
Link: https://lore.kernel.org/r/20250309185601.10616-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
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Arnd Bergmann
|
d1221aeb5a |
New boards: MNT-Reform2 laptop (rk3588), OrangePi5-Ultra (rk3588),
Radxa Rock 4D (rk3576), Firefly ROC-RK3576-PC, Photonicat (rk3568) New overlays: Video-adapters for Theobroma boards and one adapter used in hw test scenarios. Interesting bigger changes contain clock support for rk3528; support for the hdmi1 controller as well as hdmi-audio support on both controllers on rk3588; the hdmi-receiver of the rk3588 landed, and rk3576 got basic graphics support and can now do hdmi output. Another big block is that we're now doing overlays way better and are including build-testing for applied overlays to the base dtb - similar to how other arches already do this. Of cours a big list of more controllers for rk3576 (nvmem, sfc), rk3588 (rng, spdif, regulator for gpu power-domain) and rk3528 (saradc, pinctrl) And a huge number of board-level improvements and additions. -----BEGIN PGP SIGNATURE----- iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAmfMhrcQHGhlaWtvQHNu dGVjaC5kZQAKCRDzpnnJnNEdgS+yCACGOX4BatsdndoOWcr+SeySPVq8CWGONLyk WPPFC/2JA/a+oFr1YurPZW3+mVfL1ZVauqO7NZluE+6CJOc8+FqobkMOIvJJv15J jqhGGFLy83IUVwErgGpaxtwQNNPoQahSJuEDmv161knThRaTIjW1w/nrVcEMhSWp YX73mKQcV2jUbQC/wfJzcryhAA5WJP4NGkPhO34PEyASiSbxsCpHIrWaZb1/EfBP 4nI6mSr1FpQgNsByUQPlSTbN5Yja9/BBWRZ42MIIyPlKKw/TqnMcW4eeHqhA5DS8 nNbZpHnc0Oz6SPAgSSQj0RYRf2UhubxH46ileWBuMf7IG049Sl/J =yF4g -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmfUas0ACgkQYKtH/8kJ UicarRAAuLrdhmWzSJCLo+Cot4LUzh8+l9DRpsmr++wkUyHDpDY/n6y78xqPpPE/ 6Xq2PiVRypr7A/4wQn+7zYFjujlMYTceyMGGoyMwh3iQXD/u4OrEtHlOir1YEPS9 zEf7c7Lk6e0WgA1S4tTbKkH7OK7+M8S9fiFW9UCXTvK9+Xp1CjXSKuDlHqvXqDOs HQtZ587868iYj05hBgLavD0Wucedo+ntuYGMnF0a3zPf2m2q4dc5irdoAAVpwMyJ LhCt59rSR0ZfqviW/pgOg1d5B86cVDzi4CCB6b81MQnE0T0/B19lt68nwB8b+Yu0 MqKoIGt3WWN0SJH4taTt0VGwSwKqtymqyVl1bemCwNwxT5cNmRqcQCxaglTKInQg RBkPuxK//HnknD1nHtWBi47iBpCQW88waG91WivY2iaJCa317C3B+m76iMdBIDGR ZkjymDjtrEHekJuyJH4ksDqyR0FI/WPWotO9Xpa0yscm92N3Ld/ghqtUw7guDy97 cdSLl4HYSl5cM3eWlBuyeq4pvFnWQ8IXObO4UdoNYNBS/cE9rV/OYqiXxoRAEVey i3gUsgHtcmyfVnnqGuFC/6obC9LGWJq4xnyccsPERI6dEDERhjCx9xNjUuxblfT5 kNzxBK8a8FpSoQjJ47nJat/xMIwPoWBlOsGp7joKcRYBXmgGChs= =EFnK -----END PGP SIGNATURE----- Merge tag 'v6.15-rockchip-dts64-1' of https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into soc/dt New boards: MNT-Reform2 laptop (rk3588), OrangePi5-Ultra (rk3588), Radxa Rock 4D (rk3576), Firefly ROC-RK3576-PC, Photonicat (rk3568) New overlays: Video-adapters for Theobroma boards and one adapter used in hw test scenarios. Interesting bigger changes contain clock support for rk3528; support for the hdmi1 controller as well as hdmi-audio support on both controllers on rk3588; the hdmi-receiver of the rk3588 landed, and rk3576 got basic graphics support and can now do hdmi output. Another big block is that we're now doing overlays way better and are including build-testing for applied overlays to the base dtb - similar to how other arches already do this. Of cours a big list of more controllers for rk3576 (nvmem, sfc), rk3588 (rng, spdif, regulator for gpu power-domain) and rk3528 (saradc, pinctrl) And a huge number of board-level improvements and additions. * tag 'v6.15-rockchip-dts64-1' of https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: (89 commits) arm64: dts: rockchip: Add SPI NOR device on the ROCK 4D arm64: dts: rockchip: Add SFC nodes for rk3576 arm64: dts: rockchip: Add maskrom button to Radxa E20C arm64: dts: rockchip: Add SARADC node for RK3528 arm64: dts: rockchip: Add user button to Radxa E20C arm64: dts: rockchip: Add leds node to Radxa E20C arm64: dts: rockchip: Add HDMI support for rock-4d arm64: dts: rockchip: enable SCMI clk for RK3528 SoC arm64: dts: rockchip: Enable HDMI receiver on rock-5b arm64: dts: rockchip: Add device tree support for HDMI RX Controller arm64: dts: rockchip: Add rk3528 QoS register node dt-bindings: mfd: syscon: Add rk3528 QoS register compatible arm64: dts: rockchip: add MNT Reform 2 laptop dt-bindings: arm: rockchip: Add MNT Reform 2 (RCORE) dt-bindings: soc: rockchip: Add RK3528 VPU GRF syscon dt-bindings: soc: rockchip: Add RK3528 VO GRF syscon arm64: dts: rockchip: Enable hdmi out display for rk3576-evb-v10 arm64: dts: rockchip: Enable hdmi display on sige5 arm64: dts: rockchip: Add hdmi for rk3576 arm64: dts: rockchip: Add vop for rk3576 ... Link: https://lore.kernel.org/r/13791512.uLZWGnKmhe@phil Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Andre Przywara
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52dbf84857 |
dt-bindings: clk: sunxi-ng: document two Allwinner A523 CCUs
The Allwinner A523/T527 SoCs have four CCUs, this adds the binding for the main and the PRCM R-CCU. The source clock list differs in some annoying details, and folding this into the existing Allwinner CCU clock binding document gets quite unwieldy, so create a new document for these CCUs. Add the new compatible string, along with the required input clock lists. This conditionally describes the input clock lists, to make adding support for the other two CCUs easier. Also add the DT binding headers, listing all the clocks with their ID numbers. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20250307002628.10684-5-andre.przywara@arm.com Signed-off-by: Chen-Yu Tsai <wens@csie.org> |
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Kaustabh Chakraborty
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35b2b3328c |
dt-bindings: clock: add clock definitions and documentation for exynos7870 CMU
Add unique identifiers for exynos7870 clocks for every bank. It adds all clocks of CMU_MIF, CMU_DISPAUD, CMU_G3D, CMU_ISP, CMU_MFCMSCL, and CMU_PERI. Document the devicetree bindings as well. Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250301-exynos7870-pmu-clocks-v5-1-715b646d5206@disroot.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> |
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Ivaylo Ivanov
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6662c09c0d |
dt-bindings: clock: add Exynos2200 SoC
Provide dt-schema documentation for Exynos2200 SoC clock controller. Add device tree clock binding definitions for the following CMU blocks: - CMU_ALIVE - CMU_CMGP - CMU_HSI0 - CMU_PERIC0/1/2 - CMU_PERIS - CMU_TOP - CMU_UFS - CMU_VTS Signed-off-by: Ivaylo Ivanov <ivo.ivanov.ivanov1@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250223115601.723886-2-ivo.ivanov.ivanov1@gmail.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> |
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Heiko Stuebner
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d7ef9f7fb3 | Merge branch 'v6.15-shared/clkids' into v6.15-clk/next | ||
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Kever Yang
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dd113c4fef |
dt-bindings: clock: Add RK3562 cru
Document the device tree bindings of the rockchip rk3562 SoC clock and reset unit. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: "Rob Herring (Arm)" <robh@kernel.org> Link: https://lore.kernel.org/r/20250227105916.2340856-2-kever.yang@rock-chips.com Signed-off-by: Heiko Stuebner <heiko@sntech.de> |
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AngeloGioacchino Del Regno
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8c1d4d8f4c |
dt-bindings: clock: mediatek,mt8188: Add VDO1_DPI1_HDMI clock
Add binding for the HDMI TX clock found in the VDO1 controller. While at it, also remove the unused CLK_VDO1_NR_CLK. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20250212100342.33618-1-angelogioacchino.delregno@collabora.com Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
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Heiko Stuebner
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3688efdbfd | Merge branch 'v6.15-shared/clkids' into v6.15-clk/next | ||
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Yao Zi
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e0c0a97bc3 |
dt-bindings: clock: Document clock and reset unit of RK3528
There are two types of clocks in RK3528 SoC, CRU-managed and SCMI-managed. Independent IDs are assigned to them. For the reset part, differing from previous Rockchip SoCs and downstream bindings which embeds register offsets into the IDs, gapless numbers starting from zero are used. Signed-off-by: Yao Zi <ziyao@disroot.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250217061142.38480-6-ziyao@disroot.org Signed-off-by: Heiko Stuebner <heiko@sntech.de> |
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Krzysztof Kozlowski
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d1f28e30a5 |
dt-bindings: display/msm/dsi-phy: Add header with exposed clock IDs
DSI phys, from earliest (28 nm) up to newest (3 nm) generation, provide two clocks. The respective clock ID is used by drivers and DTS, so it should be documented as explicit ABI. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Stephen Boyd <sboyd@kernel.org> Acked-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/634146/ Link: https://lore.kernel.org/r/20250127132105.107138-1-krzysztof.kozlowski@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> |
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Chris Morgan
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c240648b78 |
dt-bindings: clock: sun50i-h616-ccu: Add LCD TCON clk and reset
Add the required clock and reset bindings for the LCD TCON. Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://patch.msgid.link/20250213172248.158447-2-macroalpha82@gmail.com Signed-off-by: Chen-Yu Tsai <wens@csie.org> |
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Sergio Paracuellos
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adb2424d0d |
dt-bindings: clock: add clock definitions for Ralink SoCs
Add clock missing definitions for RT2880, RT305X, RT3352, RT3383, RT5350, MT7620 and MT76X8 Ralink SoCs. Update bindings to clarify clock depending on these new introduced constants so consumer nodes can easily use the correct one in DTS files matching properly what is being used in driver code (clock IDs are implicitly used there). Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> |
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Michal Simek
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f0ceedd52a |
dt-bindings: xilinx: Deprecate header with firmware constants
Firmware contants do not fit the purpose of bindings because they are not
independent IDs for abstractions. They are more or less just contants which
better to wire via header with DT which is using it.
That's why add deprecated message to dt binding header and also update
existing dt bindings not to use macros from the header and replace them by
it's value. Actually value is not relevant because it is only example.
The similar changes have been done by commit
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