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dt-bindings: PCI: qcom,pcie-ipq8074: Move IPQ8074 to dedicated schema

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Move IPQ8074 PCIe devices from qcom,pcie.yaml binding to a dedicated
file to make reviewing and maintenance easier.

New schema is equivalent to the old one with few changes:
 - Adding a required compatible, which is actually redundant.
 - Drop the really obvious comments next to clock/reg/reset-names items.
 - Expecting eight MSI interrupts and one global, instead of only one,
   which was incomplete hardware description.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://patch.msgid.link/20251217-dt-bindings-pci-qcom-v2-7-873721599754@oss.qualcomm.com
This commit is contained in:
Krzysztof Kozlowski
2025-12-17 17:19:13 +01:00
committed by Manivannan Sadhasivam
parent 06f4ac1f76
commit edf1701c86
2 changed files with 165 additions and 35 deletions
Download Patch File Download Diff File Expand all files Collapse all files

165
Documentation/devicetree/bindings/pci/qcom,pcie-ipq8074.yaml Normal file
View File

@@ -0,0 +1,165 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/pci/qcom,pcie-ipq8074.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm IPQ8074 PCI Express Root Complex
maintainers:
- Bjorn Andersson <andersson@kernel.org>
- Manivannan Sadhasivam <mani@kernel.org>
properties:
compatible:
enum:
- qcom,pcie-ipq8074
reg:
maxItems: 4
reg-names:
items:
- const: dbi
- const: elbi
- const: parf
- const: config
clocks:
maxItems: 5
clock-names:
items:
- const: iface # PCIe to SysNOC BIU clock
- const: axi_m # AXI Master clock
- const: axi_s # AXI Slave clock
- const: ahb
- const: aux
interrupts:
maxItems: 9
interrupt-names:
items:
- const: msi0
- const: msi1
- const: msi2
- const: msi3
- const: msi4
- const: msi5
- const: msi6
- const: msi7
- const: global
resets:
maxItems: 7
reset-names:
items:
- const: pipe
- const: sleep
- const: sticky # Core sticky reset
- const: axi_m # AXI master reset
- const: axi_s # AXI slave reset
- const: ahb
- const: axi_m_sticky # AXI master sticky reset
required:
- resets
- reset-names
allOf:
- $ref: qcom,pcie-common.yaml#
unevaluatedProperties: false
examples:
- |
#include <dt-bindings/clock/qcom,gcc-ipq8074.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
pcie@10000000 {
compatible = "qcom,pcie-ipq8074";
reg = <0x10000000 0xf1d>,
<0x10000f20 0xa8>,
<0x00088000 0x2000>,
<0x10100000 0x1000>;
reg-names = "dbi", "elbi", "parf", "config";
ranges = <0x81000000 0x0 0x00000000 0x10200000 0x0 0x10000>, /* I/O */
<0x82000000 0x0 0x10220000 0x10220000 0x0 0xfde0000>; /* MEM */
device_type = "pci";
linux,pci-domain = <1>;
bus-range = <0x00 0xff>;
num-lanes = <1>;
max-link-speed = <2>;
#address-cells = <3>;
#size-cells = <2>;
clocks = <&gcc GCC_SYS_NOC_PCIE1_AXI_CLK>,
<&gcc GCC_PCIE1_AXI_M_CLK>,
<&gcc GCC_PCIE1_AXI_S_CLK>,
<&gcc GCC_PCIE1_AHB_CLK>,
<&gcc GCC_PCIE1_AUX_CLK>;
clock-names = "iface",
"axi_m",
"axi_s",
"ahb",
"aux";
interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "msi0",
"msi1",
"msi2",
"msi3",
"msi4",
"msi5",
"msi6",
"msi7",
"global";
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 0x7>;
interrupt-map = <0 0 0 1 &intc 0 GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
<0 0 0 2 &intc 0 GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>, /* int_b */
<0 0 0 3 &intc 0 GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>, /* int_c */
<0 0 0 4 &intc 0 GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; /* int_d */
phys = <&pcie_qmp1>;
phy-names = "pciephy";
resets = <&gcc GCC_PCIE1_PIPE_ARES>,
<&gcc GCC_PCIE1_SLEEP_ARES>,
<&gcc GCC_PCIE1_CORE_STICKY_ARES>,
<&gcc GCC_PCIE1_AXI_MASTER_ARES>,
<&gcc GCC_PCIE1_AXI_SLAVE_ARES>,
<&gcc GCC_PCIE1_AHB_ARES>,
<&gcc GCC_PCIE1_AXI_MASTER_STICKY_ARES>;
reset-names = "pipe",
"sleep",
"sticky",
"axi_m",
"axi_s",
"ahb",
"axi_m_sticky";
perst-gpios = <&tlmm 58 GPIO_ACTIVE_LOW>;
pcie@0 {
device_type = "pci";
reg = <0x0 0x0 0x0 0x0 0x0>;
bus-range = <0x01 0xff>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
};
};

35
Documentation/devicetree/bindings/pci/qcom,pcie.yaml
View File

@@ -23,7 +23,6 @@ properties:
- qcom,pcie-ipq4019
- qcom,pcie-ipq8064
- qcom,pcie-ipq8064-v2
- qcom,pcie-ipq8074
- qcom,pcie-ipq9574
- qcom,pcie-msm8996
- items:
@@ -144,7 +143,6 @@ allOf:
- qcom,pcie-ipq4019
- qcom,pcie-ipq8064
- qcom,pcie-ipq8064v2
- qcom,pcie-ipq8074
then:
properties:
reg:
@@ -315,37 +313,6 @@ allOf:
resets: false
reset-names: false
- if:
properties:
compatible:
contains:
enum:
- qcom,pcie-ipq8074
then:
properties:
clocks:
minItems: 5
maxItems: 5
clock-names:
items:
- const: iface # PCIe to SysNOC BIU clock
- const: axi_m # AXI Master clock
- const: axi_s # AXI Slave clock
- const: ahb # AHB clock
- const: aux # Auxiliary clock
resets:
minItems: 7
maxItems: 7
reset-names:
items:
- const: pipe # PIPE reset
- const: sleep # Sleep reset
- const: sticky # Core Sticky reset
- const: axi_m # AXI Master reset
- const: axi_s # AXI Slave reset
- const: ahb # AHB Reset
- const: axi_m_sticky # AXI Master Sticky reset
- if:
properties:
compatible:
@@ -405,7 +372,6 @@ allOf:
- qcom,pcie-ipq4019
- qcom,pcie-ipq8064
- qcom,pcie-ipq8064v2
- qcom,pcie-ipq8074
- qcom,pcie-ipq9574
then:
required:
@@ -428,7 +394,6 @@ allOf:
compatible:
contains:
enum:
- qcom,pcie-ipq8074
- qcom,pcie-msm8996
- qcom,pcie-msm8998
then: