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drm/amdgpu: Enable IH CAM on IH 7.1.0

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Enable IH CAM to handle retry faults on IH 7.1.0.
Also increase the soft ring size.

Signed-off-by: Mukul Joshi <mukul.joshi@amd.com>
Reviewed-by: Philip Yang <Philip.Yang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Mukul Joshi
2024-11-04 19:23:23 -05:00
committed by Alex Deucher
parent 692c70f4d8
commit e06d194201
1 changed files with 29 additions and 1 deletions
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30
drivers/gpu/drm/amd/amdgpu/ih_v7_0.c
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@@ -279,6 +279,16 @@ static int ih_v7_0_enable_ring(struct amdgpu_device *adev,
return 0;
}
static uint32_t ih_v7_0_setup_retry_doorbell(u32 doorbell_index)
{
u32 val = 0;
val = REG_SET_FIELD(val, IH_DOORBELL_RPTR, OFFSET, doorbell_index);
val = REG_SET_FIELD(val, IH_DOORBELL_RPTR, ENABLE, 1);
return val;
}
/**
* ih_v7_0_irq_init - init and enable the interrupt ring
*
@@ -363,6 +373,21 @@ static int ih_v7_0_irq_init(struct amdgpu_device *adev)
pci_set_master(adev->pdev);
if (amdgpu_ip_version(adev, OSSSYS_HWIP, 0) == IP_VERSION(7, 1, 0)) {
/* Allocate the doorbell for IH Retry CAM */
adev->irq.retry_cam_doorbell_index = (adev->doorbell_index.ih + 2) << 1;
WREG32_SOC15(OSSSYS, 0, regIH_DOORBELL_RETRY_CAM,
ih_v7_0_setup_retry_doorbell(adev->irq.retry_cam_doorbell_index));
/* Enable IH Retry CAM */
tmp = RREG32_SOC15(OSSSYS, 0, regIH_RETRY_INT_CAM_CNTL);
tmp = REG_SET_FIELD(tmp, IH_RETRY_INT_CAM_CNTL, ENABLE, 1);
tmp = REG_SET_FIELD(tmp, IH_RETRY_INT_CAM_CNTL, CAM_SIZE, 0xF);
WREG32_SOC15(OSSSYS, 0, regIH_RETRY_INT_CAM_CNTL, tmp);
adev->irq.retry_cam_enabled = true;
}
/* enable interrupts */
ret = ih_v7_0_toggle_interrupts(adev, true);
if (ret)
@@ -542,6 +567,7 @@ static int ih_v7_0_sw_init(struct amdgpu_ip_block *ip_block)
int r;
struct amdgpu_device *adev = ip_block->adev;
bool use_bus_addr;
unsigned int sw_ring_size;
r = amdgpu_irq_add_id(adev, SOC21_IH_CLIENTID_IH, 0,
&adev->irq.self_irq);
@@ -573,7 +599,9 @@ static int ih_v7_0_sw_init(struct amdgpu_ip_block *ip_block)
/* initialize ih control register offset */
ih_v7_0_init_register_offset(adev);
r = amdgpu_ih_ring_init(adev, &adev->irq.ih_soft, PAGE_SIZE, true);
sw_ring_size = (amdgpu_ip_version(adev, OSSSYS_HWIP, 0) == IP_VERSION(7, 1, 0)) ?
IH_SW_RING_SIZE : PAGE_SIZE;
r = amdgpu_ih_ring_init(adev, &adev->irq.ih_soft, sw_ring_size, true);
if (r)
return r;