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Documentation: kvm: fix formatting of the quirks table
A recently added quirk does not fit in the left column of the table, so it all has to be reformatted and realigned. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
This commit is contained in:
Paolo Bonzini
@@ -8435,123 +8435,123 @@ KVM_CHECK_EXTENSION.
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The valid bits in cap.args[0] are:
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=================================== ============================================
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KVM_X86_QUIRK_LINT0_REENABLED By default, the reset value for the LVT
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LINT0 register is 0x700 (APIC_MODE_EXTINT).
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When this quirk is disabled, the reset value
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is 0x10000 (APIC_LVT_MASKED).
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======================================== ================================================
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KVM_X86_QUIRK_LINT0_REENABLED By default, the reset value for the LVT
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LINT0 register is 0x700 (APIC_MODE_EXTINT).
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When this quirk is disabled, the reset value
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is 0x10000 (APIC_LVT_MASKED).
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KVM_X86_QUIRK_CD_NW_CLEARED By default, KVM clears CR0.CD and CR0.NW on
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AMD CPUs to workaround buggy guest firmware
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that runs in perpetuity with CR0.CD, i.e.
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with caches in "no fill" mode.
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KVM_X86_QUIRK_CD_NW_CLEARED By default, KVM clears CR0.CD and CR0.NW on
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AMD CPUs to workaround buggy guest firmware
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that runs in perpetuity with CR0.CD, i.e.
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with caches in "no fill" mode.
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When this quirk is disabled, KVM does not
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change the value of CR0.CD and CR0.NW.
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When this quirk is disabled, KVM does not
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change the value of CR0.CD and CR0.NW.
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KVM_X86_QUIRK_LAPIC_MMIO_HOLE By default, the MMIO LAPIC interface is
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available even when configured for x2APIC
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mode. When this quirk is disabled, KVM
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disables the MMIO LAPIC interface if the
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LAPIC is in x2APIC mode.
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KVM_X86_QUIRK_LAPIC_MMIO_HOLE By default, the MMIO LAPIC interface is
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available even when configured for x2APIC
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mode. When this quirk is disabled, KVM
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disables the MMIO LAPIC interface if the
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LAPIC is in x2APIC mode.
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KVM_X86_QUIRK_OUT_7E_INC_RIP By default, KVM pre-increments %rip before
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exiting to userspace for an OUT instruction
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to port 0x7e. When this quirk is disabled,
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KVM does not pre-increment %rip before
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exiting to userspace.
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KVM_X86_QUIRK_OUT_7E_INC_RIP By default, KVM pre-increments %rip before
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exiting to userspace for an OUT instruction
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to port 0x7e. When this quirk is disabled,
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KVM does not pre-increment %rip before
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exiting to userspace.
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KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT When this quirk is disabled, KVM sets
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CPUID.01H:ECX[bit 3] (MONITOR/MWAIT) if
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IA32_MISC_ENABLE[bit 18] (MWAIT) is set.
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Additionally, when this quirk is disabled,
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KVM clears CPUID.01H:ECX[bit 3] if
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IA32_MISC_ENABLE[bit 18] is cleared.
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KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT When this quirk is disabled, KVM sets
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CPUID.01H:ECX[bit 3] (MONITOR/MWAIT) if
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IA32_MISC_ENABLE[bit 18] (MWAIT) is set.
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Additionally, when this quirk is disabled,
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KVM clears CPUID.01H:ECX[bit 3] if
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IA32_MISC_ENABLE[bit 18] is cleared.
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KVM_X86_QUIRK_FIX_HYPERCALL_INSN By default, KVM rewrites guest
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VMMCALL/VMCALL instructions to match the
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vendor's hypercall instruction for the
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system. When this quirk is disabled, KVM
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will no longer rewrite invalid guest
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hypercall instructions. Executing the
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incorrect hypercall instruction will
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generate a #UD within the guest.
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KVM_X86_QUIRK_FIX_HYPERCALL_INSN By default, KVM rewrites guest
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VMMCALL/VMCALL instructions to match the
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vendor's hypercall instruction for the
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system. When this quirk is disabled, KVM
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will no longer rewrite invalid guest
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hypercall instructions. Executing the
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incorrect hypercall instruction will
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generate a #UD within the guest.
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KVM_X86_QUIRK_MWAIT_NEVER_UD_FAULTS By default, KVM emulates MONITOR/MWAIT (if
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they are intercepted) as NOPs regardless of
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whether or not MONITOR/MWAIT are supported
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according to guest CPUID. When this quirk
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is disabled and KVM_X86_DISABLE_EXITS_MWAIT
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is not set (MONITOR/MWAIT are intercepted),
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KVM will inject a #UD on MONITOR/MWAIT if
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they're unsupported per guest CPUID. Note,
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KVM will modify MONITOR/MWAIT support in
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guest CPUID on writes to MISC_ENABLE if
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KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT is
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disabled.
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KVM_X86_QUIRK_MWAIT_NEVER_UD_FAULTS By default, KVM emulates MONITOR/MWAIT (if
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they are intercepted) as NOPs regardless of
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whether or not MONITOR/MWAIT are supported
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according to guest CPUID. When this quirk
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is disabled and KVM_X86_DISABLE_EXITS_MWAIT
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is not set (MONITOR/MWAIT are intercepted),
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KVM will inject a #UD on MONITOR/MWAIT if
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they're unsupported per guest CPUID. Note,
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KVM will modify MONITOR/MWAIT support in
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guest CPUID on writes to MISC_ENABLE if
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KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT is
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disabled.
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KVM_X86_QUIRK_SLOT_ZAP_ALL By default, for KVM_X86_DEFAULT_VM VMs, KVM
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invalidates all SPTEs in all memslots and
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address spaces when a memslot is deleted or
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moved. When this quirk is disabled (or the
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VM type isn't KVM_X86_DEFAULT_VM), KVM only
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ensures the backing memory of the deleted
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or moved memslot isn't reachable, i.e KVM
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_may_ invalidate only SPTEs related to the
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memslot.
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KVM_X86_QUIRK_SLOT_ZAP_ALL By default, for KVM_X86_DEFAULT_VM VMs, KVM
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invalidates all SPTEs in all memslots and
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address spaces when a memslot is deleted or
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moved. When this quirk is disabled (or the
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VM type isn't KVM_X86_DEFAULT_VM), KVM only
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ensures the backing memory of the deleted
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or moved memslot isn't reachable, i.e KVM
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_may_ invalidate only SPTEs related to the
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memslot.
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KVM_X86_QUIRK_STUFF_FEATURE_MSRS By default, at vCPU creation, KVM sets the
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vCPU's MSR_IA32_PERF_CAPABILITIES (0x345),
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MSR_IA32_ARCH_CAPABILITIES (0x10a),
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MSR_PLATFORM_INFO (0xce), and all VMX MSRs
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(0x480..0x492) to the maximal capabilities
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supported by KVM. KVM also sets
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MSR_IA32_UCODE_REV (0x8b) to an arbitrary
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value (which is different for Intel vs.
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AMD). Lastly, when guest CPUID is set (by
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userspace), KVM modifies select VMX MSR
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fields to force consistency between guest
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CPUID and L2's effective ISA. When this
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quirk is disabled, KVM zeroes the vCPU's MSR
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values (with two exceptions, see below),
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i.e. treats the feature MSRs like CPUID
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leaves and gives userspace full control of
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the vCPU model definition. This quirk does
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not affect VMX MSRs CR0/CR4_FIXED1 (0x487
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and 0x489), as KVM does now allow them to
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be set by userspace (KVM sets them based on
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guest CPUID, for safety purposes).
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KVM_X86_QUIRK_STUFF_FEATURE_MSRS By default, at vCPU creation, KVM sets the
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vCPU's MSR_IA32_PERF_CAPABILITIES (0x345),
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MSR_IA32_ARCH_CAPABILITIES (0x10a),
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MSR_PLATFORM_INFO (0xce), and all VMX MSRs
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(0x480..0x492) to the maximal capabilities
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supported by KVM. KVM also sets
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MSR_IA32_UCODE_REV (0x8b) to an arbitrary
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value (which is different for Intel vs.
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AMD). Lastly, when guest CPUID is set (by
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userspace), KVM modifies select VMX MSR
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fields to force consistency between guest
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CPUID and L2's effective ISA. When this
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quirk is disabled, KVM zeroes the vCPU's MSR
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values (with two exceptions, see below),
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i.e. treats the feature MSRs like CPUID
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leaves and gives userspace full control of
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the vCPU model definition. This quirk does
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not affect VMX MSRs CR0/CR4_FIXED1 (0x487
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and 0x489), as KVM does now allow them to
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be set by userspace (KVM sets them based on
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guest CPUID, for safety purposes).
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KVM_X86_QUIRK_IGNORE_GUEST_PAT By default, on Intel platforms, KVM ignores
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guest PAT and forces the effective memory
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type to WB in EPT. The quirk is not available
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on Intel platforms which are incapable of
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safely honoring guest PAT (i.e., without CPU
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self-snoop, KVM always ignores guest PAT and
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forces effective memory type to WB). It is
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also ignored on AMD platforms or, on Intel,
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when a VM has non-coherent DMA devices
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assigned; KVM always honors guest PAT in
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such case. The quirk is needed to avoid
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slowdowns on certain Intel Xeon platforms
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(e.g. ICX, SPR) where self-snoop feature is
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supported but UC is slow enough to cause
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issues with some older guests that use
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UC instead of WC to map the video RAM.
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Userspace can disable the quirk to honor
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guest PAT if it knows that there is no such
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guest software, for example if it does not
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expose a bochs graphics device (which is
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known to have had a buggy driver).
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KVM_X86_QUIRK_IGNORE_GUEST_PAT By default, on Intel platforms, KVM ignores
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guest PAT and forces the effective memory
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type to WB in EPT. The quirk is not available
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on Intel platforms which are incapable of
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safely honoring guest PAT (i.e., without CPU
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self-snoop, KVM always ignores guest PAT and
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forces effective memory type to WB). It is
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also ignored on AMD platforms or, on Intel,
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when a VM has non-coherent DMA devices
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assigned; KVM always honors guest PAT in
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such case. The quirk is needed to avoid
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slowdowns on certain Intel Xeon platforms
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(e.g. ICX, SPR) where self-snoop feature is
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supported but UC is slow enough to cause
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issues with some older guests that use
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UC instead of WC to map the video RAM.
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Userspace can disable the quirk to honor
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guest PAT if it knows that there is no such
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guest software, for example if it does not
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expose a bochs graphics device (which is
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known to have had a buggy driver).
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KVM_X86_QUIRK_VMCS12_ALLOW_FREEZE_IN_SMM By default, KVM relaxes the consistency
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check for GUEST_IA32_DEBUGCTL in vmcs12
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to allow FREEZE_IN_SMM to be set. When
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this quirk is disabled, KVM requires this
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bit to be cleared. Note that the vmcs02
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bit is still completely controlled by the
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host, regardless of the quirk setting.
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=================================== ============================================
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check for GUEST_IA32_DEBUGCTL in vmcs12
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to allow FREEZE_IN_SMM to be set. When
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this quirk is disabled, KVM requires this
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bit to be cleared. Note that the vmcs02
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bit is still completely controlled by the
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host, regardless of the quirk setting.
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======================================== ================================================
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7.32 KVM_CAP_MAX_VCPU_ID
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------------------------
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