torvalds/linux
3
0
Fork 0
mirror of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git synced 2026-04-07 06:59:25 +08:00
Code Issues Packages Projects Releases Wiki Activity

Merge branch 'pci/controller/j721e'

Browse Source 
- Add MODULE_DEVICE_TABLE() so driver can be autoloaded (Siddharth
  Vadapalli)

- Power controller off before configuring the glue layer so the controller
  latches the correct values on power-on (Siddharth Vadapalli)

- Correct the error message when j721e_pcie_ctrl_init() fails (Alok Tiwari)

* pci/controller/j721e:
  PCI: j721e: Fix incorrect error message in probe()
  PCI: j721e: Fix programming sequence of "strap" settings
  PCI: j721e: Fix module autoloading
This commit is contained in:
Bjorn Helgaas
2025-10-03 12:13:18 -05:00
parent efe4466add cfcd6cab2f
commit da72dcc28e
1 changed files with 27 additions and 1 deletions
Download Patch File Download Diff File Expand all files Collapse all files

28
drivers/pci/controller/cadence/pci-j721e.c
View File

@@ -284,6 +284,25 @@ static int j721e_pcie_ctrl_init(struct j721e_pcie *pcie)
if (!ret)
offset = args.args[0];
/*
* The PCIe Controller's registers have different "reset-values"
* depending on the "strap" settings programmed into the PCIEn_CTRL
* register within the CTRL_MMR memory-mapped register space.
* The registers latch onto a "reset-value" based on the "strap"
* settings sampled after the PCIe Controller is powered on.
* To ensure that the "reset-values" are sampled accurately, power
* off the PCIe Controller before programming the "strap" settings
* and power it on after that. The runtime PM APIs namely
* pm_runtime_put_sync() and pm_runtime_get_sync() will decrement and
* increment the usage counter respectively, causing GENPD to power off
* and power on the PCIe Controller.
*/
ret = pm_runtime_put_sync(dev);
if (ret < 0) {
dev_err(dev, "Failed to power off PCIe Controller\n");
return ret;
}
ret = j721e_pcie_set_mode(pcie, syscon, offset);
if (ret < 0) {
dev_err(dev, "Failed to set pci mode\n");
@@ -302,6 +321,12 @@ static int j721e_pcie_ctrl_init(struct j721e_pcie *pcie)
return ret;
}
ret = pm_runtime_get_sync(dev);
if (ret < 0) {
dev_err(dev, "Failed to power on PCIe Controller\n");
return ret;
}
/* Enable ACSPCIE refclk output if the optional property exists */
syscon = syscon_regmap_lookup_by_phandle_optional(node,
"ti,syscon-acspcie-proxy-ctrl");
@@ -440,6 +465,7 @@ static const struct of_device_id of_j721e_pcie_match[] = {
},
{},
};
MODULE_DEVICE_TABLE(of, of_j721e_pcie_match);
static int j721e_pcie_probe(struct platform_device *pdev)
{
@@ -549,7 +575,7 @@ static int j721e_pcie_probe(struct platform_device *pdev)
ret = j721e_pcie_ctrl_init(pcie);
if (ret < 0) {
dev_err_probe(dev, ret, "pm_runtime_get_sync failed\n");
dev_err_probe(dev, ret, "j721e_pcie_ctrl_init failed\n");
goto err_get_sync;
}