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LoongArch: KVM: Handle LOONGARCH_CSR_IPR during vCPU context switch

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Register LOONGARCH_CSR_IPR is interrupt priority setting for nested
interrupt handling. Though LoongArch Linux AVEC driver does not use
this register, KVM hypervisor needs to save and restore this it during
vCPU context switch. Because Linux AVEC driver may use this register
in future, or other OS may use it.

Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
This commit is contained in:
Bibo Mao
2026-02-06 09:27:46 +08:00
committed by Huacai Chen
parent c2f94dafe1
commit c5cb12b81a
3 changed files with 4 additions and 0 deletions
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1
arch/loongarch/include/asm/loongarch.h
View File

@@ -690,6 +690,7 @@
#define LOONGARCH_CSR_ISR3 0xa3
#define LOONGARCH_CSR_IRR 0xa4
#define LOONGARCH_CSR_IPR 0xa5
#define LOONGARCH_CSR_PRID 0xc0

1
arch/loongarch/kvm/main.c
View File

@@ -194,6 +194,7 @@ static void kvm_init_gcsr_flag(void)
set_gcsr_sw_flag(LOONGARCH_CSR_PERFCNTR3);
if (cpu_has_msgint) {
set_gcsr_hw_flag(LOONGARCH_CSR_IPR);
set_gcsr_hw_flag(LOONGARCH_CSR_ISR0);
set_gcsr_hw_flag(LOONGARCH_CSR_ISR1);
set_gcsr_hw_flag(LOONGARCH_CSR_ISR2);

2
arch/loongarch/kvm/vcpu.c
View File

@@ -1681,6 +1681,7 @@ static int _kvm_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
kvm_restore_hw_gcsr(csr, LOONGARCH_CSR_LLBCTL);
if (kvm_guest_has_msgint(&vcpu->arch)) {
kvm_restore_hw_gcsr(csr, LOONGARCH_CSR_IPR);
kvm_restore_hw_gcsr(csr, LOONGARCH_CSR_ISR0);
kvm_restore_hw_gcsr(csr, LOONGARCH_CSR_ISR1);
kvm_restore_hw_gcsr(csr, LOONGARCH_CSR_ISR2);
@@ -1777,6 +1778,7 @@ static int _kvm_vcpu_put(struct kvm_vcpu *vcpu, int cpu)
kvm_save_hw_gcsr(csr, LOONGARCH_CSR_DMWIN3);
if (kvm_guest_has_msgint(&vcpu->arch)) {
kvm_save_hw_gcsr(csr, LOONGARCH_CSR_IPR);
kvm_save_hw_gcsr(csr, LOONGARCH_CSR_ISR0);
kvm_save_hw_gcsr(csr, LOONGARCH_CSR_ISR1);
kvm_save_hw_gcsr(csr, LOONGARCH_CSR_ISR2);