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drm/i915/hdcp: split out intel_hdcp_shim.h for struct intel_hdcp_shim
There are only a handful of files that need the struct intel_hdcp_shim definition. Move it to a new file intel_hdcp_shim.h and include where needed. Reviewed-by: Luca Coelho <luciano.coelho@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/8dc62bed1f4c827730f66f91a18e1cf0712df123.1724689818.git.jani.nikula@intel.com
This commit is contained in:
@@ -59,9 +59,10 @@
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struct drm_printer;
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struct __intel_global_objs_state;
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struct intel_connector;
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struct intel_ddi_buf_trans;
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struct intel_fbc;
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struct intel_connector;
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struct intel_hdcp_shim;
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struct intel_tc_port;
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/*
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@@ -430,128 +431,6 @@ struct intel_panel {
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struct intel_digital_port;
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enum check_link_response {
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HDCP_LINK_PROTECTED = 0,
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HDCP_TOPOLOGY_CHANGE,
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HDCP_LINK_INTEGRITY_FAILURE,
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HDCP_REAUTH_REQUEST
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};
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/*
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* This structure serves as a translation layer between the generic HDCP code
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* and the bus-specific code. What that means is that HDCP over HDMI differs
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* from HDCP over DP, so to account for these differences, we need to
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* communicate with the receiver through this shim.
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*
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* For completeness, the 2 buses differ in the following ways:
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* - DP AUX vs. DDC
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* HDCP registers on the receiver are set via DP AUX for DP, and
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* they are set via DDC for HDMI.
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* - Receiver register offsets
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* The offsets of the registers are different for DP vs. HDMI
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* - Receiver register masks/offsets
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* For instance, the ready bit for the KSV fifo is in a different
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* place on DP vs HDMI
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* - Receiver register names
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* Seriously. In the DP spec, the 16-bit register containing
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* downstream information is called BINFO, on HDMI it's called
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* BSTATUS. To confuse matters further, DP has a BSTATUS register
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* with a completely different definition.
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* - KSV FIFO
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* On HDMI, the ksv fifo is read all at once, whereas on DP it must
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* be read 3 keys at a time
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* - Aksv output
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* Since Aksv is hidden in hardware, there's different procedures
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* to send it over DP AUX vs DDC
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*/
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struct intel_hdcp_shim {
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/* Outputs the transmitter's An and Aksv values to the receiver. */
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int (*write_an_aksv)(struct intel_digital_port *dig_port, u8 *an);
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/* Reads the receiver's key selection vector */
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int (*read_bksv)(struct intel_digital_port *dig_port, u8 *bksv);
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/*
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* Reads BINFO from DP receivers and BSTATUS from HDMI receivers. The
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* definitions are the same in the respective specs, but the names are
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* different. Call it BSTATUS since that's the name the HDMI spec
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* uses and it was there first.
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*/
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int (*read_bstatus)(struct intel_digital_port *dig_port,
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u8 *bstatus);
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/* Determines whether a repeater is present downstream */
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int (*repeater_present)(struct intel_digital_port *dig_port,
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bool *repeater_present);
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/* Reads the receiver's Ri' value */
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int (*read_ri_prime)(struct intel_digital_port *dig_port, u8 *ri);
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/* Determines if the receiver's KSV FIFO is ready for consumption */
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int (*read_ksv_ready)(struct intel_digital_port *dig_port,
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bool *ksv_ready);
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/* Reads the ksv fifo for num_downstream devices */
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int (*read_ksv_fifo)(struct intel_digital_port *dig_port,
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int num_downstream, u8 *ksv_fifo);
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/* Reads a 32-bit part of V' from the receiver */
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int (*read_v_prime_part)(struct intel_digital_port *dig_port,
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int i, u32 *part);
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/* Enables HDCP signalling on the port */
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int (*toggle_signalling)(struct intel_digital_port *dig_port,
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enum transcoder cpu_transcoder,
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bool enable);
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/* Enable/Disable stream encryption on DP MST Transport Link */
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int (*stream_encryption)(struct intel_connector *connector,
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bool enable);
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/* Ensures the link is still protected */
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bool (*check_link)(struct intel_digital_port *dig_port,
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struct intel_connector *connector);
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/* Detects panel's hdcp capability. This is optional for HDMI. */
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int (*hdcp_get_capability)(struct intel_digital_port *dig_port,
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bool *hdcp_capable);
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/* HDCP adaptation(DP/HDMI) required on the port */
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enum hdcp_wired_protocol protocol;
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/* Detects whether sink is HDCP2.2 capable */
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int (*hdcp_2_2_get_capability)(struct intel_connector *connector,
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bool *capable);
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/* Write HDCP2.2 messages */
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int (*write_2_2_msg)(struct intel_connector *connector,
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void *buf, size_t size);
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/* Read HDCP2.2 messages */
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int (*read_2_2_msg)(struct intel_connector *connector,
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u8 msg_id, void *buf, size_t size);
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/*
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* Implementation of DP HDCP2.2 Errata for the communication of stream
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* type to Receivers. In DP HDCP2.2 Stream type is one of the input to
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* the HDCP2.2 Cipher for En/De-Cryption. Not applicable for HDMI.
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*/
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int (*config_stream_type)(struct intel_connector *connector,
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bool is_repeater, u8 type);
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/* Enable/Disable HDCP 2.2 stream encryption on DP MST Transport Link */
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int (*stream_2_2_encryption)(struct intel_connector *connector,
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bool enable);
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/* HDCP2.2 Link Integrity Check */
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int (*check_2_2_link)(struct intel_digital_port *dig_port,
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struct intel_connector *connector);
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/* HDCP remote sink cap */
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int (*get_remote_hdcp_capability)(struct intel_connector *connector,
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bool *hdcp_capable, bool *hdcp2_capable);
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};
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struct intel_hdcp {
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const struct intel_hdcp_shim *shim;
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/* Mutex for hdcp state of the connector */
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@@ -19,6 +19,7 @@
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#include "intel_dp_hdcp.h"
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#include "intel_hdcp.h"
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#include "intel_hdcp_regs.h"
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#include "intel_hdcp_shim.h"
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static u32 transcoder_to_stream_enc_status(enum transcoder cpu_transcoder)
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{
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@@ -25,6 +25,7 @@
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#include "intel_hdcp.h"
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#include "intel_hdcp_gsc.h"
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#include "intel_hdcp_regs.h"
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#include "intel_hdcp_shim.h"
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#include "intel_pcode.h"
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#define KEY_LOAD_TRIES 5
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137
drivers/gpu/drm/i915/display/intel_hdcp_shim.h
Normal file
137
drivers/gpu/drm/i915/display/intel_hdcp_shim.h
Normal file
@@ -0,0 +1,137 @@
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/* SPDX-License-Identifier: MIT */
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/* Copyright © 2024 Intel Corporation */
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#ifndef __INTEL_HDCP_SHIM_H__
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#define __INTEL_HDCP_SHIM_H__
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#include <linux/types.h>
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#include <drm/intel/i915_hdcp_interface.h>
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enum transcoder;
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struct intel_connector;
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struct intel_digital_port;
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enum check_link_response {
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HDCP_LINK_PROTECTED = 0,
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HDCP_TOPOLOGY_CHANGE,
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HDCP_LINK_INTEGRITY_FAILURE,
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HDCP_REAUTH_REQUEST
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};
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/*
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* This structure serves as a translation layer between the generic HDCP code
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* and the bus-specific code. What that means is that HDCP over HDMI differs
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* from HDCP over DP, so to account for these differences, we need to
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* communicate with the receiver through this shim.
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*
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* For completeness, the 2 buses differ in the following ways:
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* - DP AUX vs. DDC
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* HDCP registers on the receiver are set via DP AUX for DP, and
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* they are set via DDC for HDMI.
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* - Receiver register offsets
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* The offsets of the registers are different for DP vs. HDMI
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* - Receiver register masks/offsets
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* For instance, the ready bit for the KSV fifo is in a different
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* place on DP vs HDMI
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* - Receiver register names
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* Seriously. In the DP spec, the 16-bit register containing
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* downstream information is called BINFO, on HDMI it's called
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* BSTATUS. To confuse matters further, DP has a BSTATUS register
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* with a completely different definition.
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* - KSV FIFO
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* On HDMI, the ksv fifo is read all at once, whereas on DP it must
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* be read 3 keys at a time
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* - Aksv output
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* Since Aksv is hidden in hardware, there's different procedures
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* to send it over DP AUX vs DDC
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*/
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struct intel_hdcp_shim {
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/* Outputs the transmitter's An and Aksv values to the receiver. */
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int (*write_an_aksv)(struct intel_digital_port *dig_port, u8 *an);
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/* Reads the receiver's key selection vector */
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int (*read_bksv)(struct intel_digital_port *dig_port, u8 *bksv);
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/*
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* Reads BINFO from DP receivers and BSTATUS from HDMI receivers. The
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* definitions are the same in the respective specs, but the names are
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* different. Call it BSTATUS since that's the name the HDMI spec
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* uses and it was there first.
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*/
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int (*read_bstatus)(struct intel_digital_port *dig_port,
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u8 *bstatus);
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/* Determines whether a repeater is present downstream */
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int (*repeater_present)(struct intel_digital_port *dig_port,
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bool *repeater_present);
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/* Reads the receiver's Ri' value */
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int (*read_ri_prime)(struct intel_digital_port *dig_port, u8 *ri);
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/* Determines if the receiver's KSV FIFO is ready for consumption */
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int (*read_ksv_ready)(struct intel_digital_port *dig_port,
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bool *ksv_ready);
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/* Reads the ksv fifo for num_downstream devices */
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int (*read_ksv_fifo)(struct intel_digital_port *dig_port,
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int num_downstream, u8 *ksv_fifo);
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/* Reads a 32-bit part of V' from the receiver */
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int (*read_v_prime_part)(struct intel_digital_port *dig_port,
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int i, u32 *part);
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/* Enables HDCP signalling on the port */
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int (*toggle_signalling)(struct intel_digital_port *dig_port,
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enum transcoder cpu_transcoder,
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bool enable);
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/* Enable/Disable stream encryption on DP MST Transport Link */
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int (*stream_encryption)(struct intel_connector *connector,
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bool enable);
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/* Ensures the link is still protected */
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bool (*check_link)(struct intel_digital_port *dig_port,
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struct intel_connector *connector);
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/* Detects panel's hdcp capability. This is optional for HDMI. */
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int (*hdcp_get_capability)(struct intel_digital_port *dig_port,
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bool *hdcp_capable);
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/* HDCP adaptation(DP/HDMI) required on the port */
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enum hdcp_wired_protocol protocol;
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/* Detects whether sink is HDCP2.2 capable */
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int (*hdcp_2_2_get_capability)(struct intel_connector *connector,
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bool *capable);
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/* Write HDCP2.2 messages */
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int (*write_2_2_msg)(struct intel_connector *connector,
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void *buf, size_t size);
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/* Read HDCP2.2 messages */
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int (*read_2_2_msg)(struct intel_connector *connector,
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u8 msg_id, void *buf, size_t size);
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/*
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* Implementation of DP HDCP2.2 Errata for the communication of stream
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* type to Receivers. In DP HDCP2.2 Stream type is one of the input to
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* the HDCP2.2 Cipher for En/De-Cryption. Not applicable for HDMI.
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*/
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int (*config_stream_type)(struct intel_connector *connector,
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bool is_repeater, u8 type);
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/* Enable/Disable HDCP 2.2 stream encryption on DP MST Transport Link */
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int (*stream_2_2_encryption)(struct intel_connector *connector,
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bool enable);
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/* HDCP2.2 Link Integrity Check */
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int (*check_2_2_link)(struct intel_digital_port *dig_port,
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struct intel_connector *connector);
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/* HDCP remote sink cap */
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int (*get_remote_hdcp_capability)(struct intel_connector *connector,
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bool *hdcp_capable, bool *hdcp2_capable);
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};
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#endif /* __INTEL_HDCP_SHIM_H__ */
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@@ -55,6 +55,7 @@
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#include "intel_gmbus.h"
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#include "intel_hdcp.h"
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#include "intel_hdcp_regs.h"
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#include "intel_hdcp_shim.h"
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#include "intel_hdmi.h"
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#include "intel_lspcon.h"
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#include "intel_panel.h"
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