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synced 2026-03-22 07:27:12 +08:00
crypto: octeontx2 - Fix address alignment issue on ucode loading
octeontx2 crypto driver allocates memory using kmalloc/kzalloc, and uses this memory for dma (does dma_map_single()). It assumes that kmalloc/kzalloc will return 128-byte aligned address. But kmalloc/kzalloc returns 8-byte aligned address after below changes: "9382bc44b5f5 arm64: allow kmalloc() caches aligned to the smaller cache_line_size()" Completion address should be 32-Byte alignment when loading microcode. Signed-off-by: Bharat Bhushan <bbhushan2@marvell.com> Cc: <stable@vger.kernel.org> # v6.5+ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
This commit is contained in:
committed by
Herbert Xu
parent
2157e50f65
commit
b7b88b4939
@@ -1491,12 +1491,13 @@ int otx2_cpt_discover_eng_capabilities(struct otx2_cptpf_dev *cptpf)
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union otx2_cpt_opcode opcode;
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union otx2_cpt_res_s *result;
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union otx2_cpt_inst_s inst;
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dma_addr_t result_baddr;
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dma_addr_t rptr_baddr;
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struct pci_dev *pdev;
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u32 len, compl_rlen;
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int timeout = 10000;
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void *base, *rptr;
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int ret, etype;
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void *rptr;
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u32 len;
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/*
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* We don't get capabilities if it was already done
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@@ -1519,22 +1520,28 @@ int otx2_cpt_discover_eng_capabilities(struct otx2_cptpf_dev *cptpf)
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if (ret)
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goto delete_grps;
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compl_rlen = ALIGN(sizeof(union otx2_cpt_res_s), OTX2_CPT_DMA_MINALIGN);
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len = compl_rlen + LOADFVC_RLEN;
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/* Allocate extra memory for "rptr" and "result" pointer alignment */
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len = LOADFVC_RLEN + ARCH_DMA_MINALIGN +
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sizeof(union otx2_cpt_res_s) + OTX2_CPT_RES_ADDR_ALIGN;
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result = kzalloc(len, GFP_KERNEL);
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if (!result) {
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base = kzalloc(len, GFP_KERNEL);
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if (!base) {
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ret = -ENOMEM;
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goto lf_cleanup;
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}
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rptr_baddr = dma_map_single(&pdev->dev, (void *)result, len,
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DMA_BIDIRECTIONAL);
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rptr = PTR_ALIGN(base, ARCH_DMA_MINALIGN);
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rptr_baddr = dma_map_single(&pdev->dev, rptr, len, DMA_BIDIRECTIONAL);
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if (dma_mapping_error(&pdev->dev, rptr_baddr)) {
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dev_err(&pdev->dev, "DMA mapping failed\n");
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ret = -EFAULT;
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goto free_result;
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goto free_rptr;
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}
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rptr = (u8 *)result + compl_rlen;
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result = (union otx2_cpt_res_s *)PTR_ALIGN(rptr + LOADFVC_RLEN,
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OTX2_CPT_RES_ADDR_ALIGN);
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result_baddr = ALIGN(rptr_baddr + LOADFVC_RLEN,
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OTX2_CPT_RES_ADDR_ALIGN);
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/* Fill in the command */
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opcode.s.major = LOADFVC_MAJOR_OP;
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@@ -1546,14 +1553,14 @@ int otx2_cpt_discover_eng_capabilities(struct otx2_cptpf_dev *cptpf)
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/* 64-bit swap for microcode data reads, not needed for addresses */
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cpu_to_be64s(&iq_cmd.cmd.u);
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iq_cmd.dptr = 0;
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iq_cmd.rptr = rptr_baddr + compl_rlen;
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iq_cmd.rptr = rptr_baddr;
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iq_cmd.cptr.u = 0;
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for (etype = 1; etype < OTX2_CPT_MAX_ENG_TYPES; etype++) {
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result->s.compcode = OTX2_CPT_COMPLETION_CODE_INIT;
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iq_cmd.cptr.s.grp = otx2_cpt_get_eng_grp(&cptpf->eng_grps,
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etype);
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otx2_cpt_fill_inst(&inst, &iq_cmd, rptr_baddr);
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otx2_cpt_fill_inst(&inst, &iq_cmd, result_baddr);
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lfs->ops->send_cmd(&inst, 1, &cptpf->lfs.lf[0]);
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timeout = 10000;
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@@ -1576,8 +1583,8 @@ int otx2_cpt_discover_eng_capabilities(struct otx2_cptpf_dev *cptpf)
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error_no_response:
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dma_unmap_single(&pdev->dev, rptr_baddr, len, DMA_BIDIRECTIONAL);
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free_result:
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kfree(result);
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free_rptr:
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kfree(base);
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lf_cleanup:
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otx2_cptlf_shutdown(lfs);
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delete_grps:
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