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accel/ivpu: Remove boot params address setting via MMIO register

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The NPU 60XX uses the default boot params location specified
in the firmware image header, consistent with earlier generations.
Remove the unnecessary MMIO register write, freeing the AON register
for future use.

Fixes: 44e4c88951 ("accel/ivpu: Implement warm boot flow for NPU6 and unify boot handling")
Signed-off-by: Andrzej Kacprowski <andrzej.kacprowski@linux.intel.com>
Reviewed-by: Karol Wachowski <karol.wachowski@linux.intel.com>
Signed-off-by: Karol Wachowski <karol.wachowski@linux.intel.com>
Link: https://patch.msgid.link/20260305142226.194995-1-andrzej.kacprowski@linux.intel.com
(cherry picked from commit 81e62e7bf8b9309bf0febdf00940818f98bc23d8)
Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
This commit is contained in:
Andrzej Kacprowski
2026-03-05 15:22:26 +01:00
committed by Thomas Zimmermann
parent d0d7277469
commit 59bdbabcca
2 changed files with 0 additions and 7 deletions
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6
drivers/accel/ivpu/ivpu_hw_40xx_reg.h
View File

@@ -121,12 +121,6 @@
#define VPU_50XX_HOST_SS_AON_PWR_ISLAND_STATUS_DLY 0x0003006cu
#define VPU_50XX_HOST_SS_AON_PWR_ISLAND_STATUS_DLY_STATUS_DLY_MASK GENMASK(7, 0)
#define VPU_40XX_HOST_SS_AON_RETENTION0 0x0003000cu
#define VPU_40XX_HOST_SS_AON_RETENTION1 0x00030010u
#define VPU_40XX_HOST_SS_AON_RETENTION2 0x00030014u
#define VPU_40XX_HOST_SS_AON_RETENTION3 0x00030018u
#define VPU_40XX_HOST_SS_AON_RETENTION4 0x0003001cu
#define VPU_40XX_HOST_SS_AON_IDLE_GEN 0x00030200u
#define VPU_40XX_HOST_SS_AON_IDLE_GEN_EN_MASK BIT_MASK(0)
#define VPU_40XX_HOST_SS_AON_IDLE_GEN_HW_PG_EN_MASK BIT_MASK(1)

1
drivers/accel/ivpu/ivpu_hw_ip.c
View File

@@ -931,7 +931,6 @@ static int soc_cpu_boot_40xx(struct ivpu_device *vdev)
static int soc_cpu_boot_60xx(struct ivpu_device *vdev)
{
REGV_WR64(VPU_40XX_HOST_SS_AON_RETENTION1, vdev->fw->mem_bp->vpu_addr);
soc_cpu_set_entry_point_40xx(vdev, vdev->fw->cold_boot_entry_point);
return 0;