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arm64/sysreg: Enforce whole word match for open/close tokens
Opening and closing tokens can also match on words with common prefixes like "Endsysreg" vs "EndsysregFields". This could potentially make the script go wrong in weird ways so make it fall through to the fatal unhandled statement catcher if it doesn't fully match the current block. Closing ones also get expect_fields(1) to ensure nothing other than whitespace follows. Signed-off-by: James Clark <james.clark@linaro.org> Acked-by: Will Deacon <will@kernel.org> Acked-by: Mark Rutland <mark.rutland@arm.com> Link: https://lore.kernel.org/r/20250115162600.2153226-3-james.clark@linaro.org Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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Catalin Marinas
parent
00cb1e01cd
commit
2fdbf2ff38
@@ -111,7 +111,7 @@ END {
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/^$/ { next }
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/^[\t ]*#/ { next }
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/^SysregFields/ && block_current() == "Root" {
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$1 == "SysregFields" && block_current() == "Root" {
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block_push("SysregFields")
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expect_fields(2)
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@@ -127,7 +127,8 @@ END {
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next
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}
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/^EndSysregFields/ && block_current() == "SysregFields" {
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$1 == "EndSysregFields" && block_current() == "SysregFields" {
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expect_fields(1)
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if (next_bit > 0)
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fatal("Unspecified bits in " reg)
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@@ -145,7 +146,7 @@ END {
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next
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}
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/^Sysreg/ && block_current() == "Root" {
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$1 == "Sysreg" && block_current() == "Root" {
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block_push("Sysreg")
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expect_fields(7)
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@@ -177,7 +178,8 @@ END {
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next
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}
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/^EndSysreg/ && block_current() == "Sysreg" {
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$1 == "EndSysreg" && block_current() == "Sysreg" {
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expect_fields(1)
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if (next_bit > 0)
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fatal("Unspecified bits in " reg)
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@@ -206,7 +208,7 @@ END {
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# Currently this is effectivey a comment, in future we may want to emit
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# defines for the fields.
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(/^Fields/ || /^Mapping/) && block_current() == "Sysreg" {
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($1 == "Fields" || $1 == "Mapping") && block_current() == "Sysreg" {
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expect_fields(2)
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if (next_bit != 63)
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@@ -224,7 +226,7 @@ END {
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}
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/^Res0/ && (block_current() == "Sysreg" || block_current() == "SysregFields") {
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$1 == "Res0" && (block_current() == "Sysreg" || block_current() == "SysregFields") {
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expect_fields(2)
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parse_bitdef(reg, "RES0", $2)
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field = "RES0_" msb "_" lsb
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@@ -234,7 +236,7 @@ END {
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next
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}
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/^Res1/ && (block_current() == "Sysreg" || block_current() == "SysregFields") {
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$1 == "Res1" && (block_current() == "Sysreg" || block_current() == "SysregFields") {
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expect_fields(2)
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parse_bitdef(reg, "RES1", $2)
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field = "RES1_" msb "_" lsb
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@@ -244,7 +246,7 @@ END {
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next
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}
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/^Unkn/ && (block_current() == "Sysreg" || block_current() == "SysregFields") {
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$1 == "Unkn" && (block_current() == "Sysreg" || block_current() == "SysregFields") {
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expect_fields(2)
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parse_bitdef(reg, "UNKN", $2)
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field = "UNKN_" msb "_" lsb
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@@ -254,7 +256,7 @@ END {
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next
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}
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/^Field/ && (block_current() == "Sysreg" || block_current() == "SysregFields") {
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$1 == "Field" && (block_current() == "Sysreg" || block_current() == "SysregFields") {
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expect_fields(3)
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field = $3
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parse_bitdef(reg, field, $2)
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@@ -265,14 +267,14 @@ END {
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next
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}
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/^Raz/ && (block_current() == "Sysreg" || block_current() == "SysregFields") {
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$1 == "Raz" && (block_current() == "Sysreg" || block_current() == "SysregFields") {
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expect_fields(2)
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parse_bitdef(reg, field, $2)
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next
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}
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/^SignedEnum/ && (block_current() == "Sysreg" || block_current() == "SysregFields") {
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$1 == "SignedEnum" && (block_current() == "Sysreg" || block_current() == "SysregFields") {
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block_push("Enum")
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expect_fields(3)
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@@ -285,7 +287,7 @@ END {
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next
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}
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/^UnsignedEnum/ && (block_current() == "Sysreg" || block_current() == "SysregFields") {
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$1 == "UnsignedEnum" && (block_current() == "Sysreg" || block_current() == "SysregFields") {
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block_push("Enum")
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expect_fields(3)
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@@ -298,7 +300,7 @@ END {
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next
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}
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/^Enum/ && (block_current() == "Sysreg" || block_current() == "SysregFields") {
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$1 == "Enum" && (block_current() == "Sysreg" || block_current() == "SysregFields") {
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block_push("Enum")
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expect_fields(3)
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@@ -310,7 +312,8 @@ END {
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next
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}
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/^EndEnum/ && block_current() == "Enum" {
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$1 == "EndEnum" && block_current() == "Enum" {
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expect_fields(1)
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field = null
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msb = null
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