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KVM: arm64: nv: Honor MDCR_EL2.HLP
Counters that fall in the hypervisor range (i.e. N >= HPMN) have a separate control for enabling 64 bit overflow. Take it into account. Reviewed-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20241025182354.3364124-17-oliver.upton@linux.dev Signed-off-by: Oliver Upton <oliver.upton@linux.dev>
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@@ -89,7 +89,11 @@ static bool kvm_pmc_is_64bit(struct kvm_pmc *pmc)
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static bool kvm_pmc_has_64bit_overflow(struct kvm_pmc *pmc)
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{
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u64 val = kvm_vcpu_read_pmcr(kvm_pmc_to_vcpu(pmc));
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struct kvm_vcpu *vcpu = kvm_pmc_to_vcpu(pmc);
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u64 val = kvm_vcpu_read_pmcr(vcpu);
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if (kvm_pmu_counter_is_hyp(vcpu, pmc->idx))
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return __vcpu_sys_reg(vcpu, MDCR_EL2) & MDCR_EL2_HLP;
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return (pmc->idx < ARMV8_PMU_CYCLE_IDX && (val & ARMV8_PMU_PMCR_LP)) ||
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(pmc->idx == ARMV8_PMU_CYCLE_IDX && (val & ARMV8_PMU_PMCR_LC));
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