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ff877c498e
This branch contains a handful of driver updates, mostly to the LPC32xx platform but also for Samsung EXYNOS and Davinci. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQIcBAABAgAGBQJPcpr7AAoJEIwa5zzehBx39KoQAIVpIRB+yNkaR8croYkNKKe2 cYpvW1AOS1dSwPZyikRIHSHvgI2+bCr942GQklSBqdSZMC3XespI+0/Qx1UNsuLN oxE6LSjoWC1LvRQZB9yos4ASpRbZIFsrSbAKF6e6AVGswnguVzALsUG9PJ6427oK QjdMGyEqVEw1zDZdMv+Vkg1G+k5oAcXV7c1SsL4Ye6jNke1ZX9JY5LJoyJLspzL3 g7+NDTjzvSVoeGJVQEXRXxE90kZi8PgYJzZekx91BHNZpcgJdfCTYdAJX2/4lZ6T Ai9mrZzU6ivaxejxPgp7nm33BR1vEOIsZr66KTEzfufKc9unGQpci6HyOPFHgHN6 j7eEAJ1bz8m+jmWotLpnOAXJSe41uwAhRMHFUr7AwOUBxYO+Y2wqG5jhZI1krFoN Ib8NNVkjMAyqeiXJRZwxeBM+dAwqe/vFLUOOZWkpbWnj8RptCktui2rQ+4HjJCyg cJHwG24KbSx3cd924NpVgS1RnGj/ZXZeub25zvqACoDShu7+zin7UNZW1BerJr3u Hs6KnC7N6YB/4zEvdlPCNJtsMPT0LRYuEf+Z96vp9yVOT+C05iqrNKDGWNrvCg9K U+teLDwGuOo9A/u2rCkhEiub9WWV195+0IZuw4gBaZyyY4LlwNT1kMY+nZ8BdE42 3ockU8vT/7SHx3n8hGuW =TkGm -----END PGP SIGNATURE----- Merge tag 'drivers2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull "ARM: More SoC driver updates" from Olof Johansson: "This branch contains a handful of driver updates, mostly to the LPC32xx platform but also for Samsung EXYNOS and Davinci. It had a few context conflicts against patches already merged through fixes-non-critical. We should have resolved this early during the development cycle by pulling them in as a dependency, instead I did it after the fact this time." * tag 'drivers2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: gpio/samsung: use ioremap() for EXYNOS4 GPIOlib gpio/samsung: add support GPIOlib for EXYNOS5250 ARM: EXYNOS: add support GPIO for EXYNOS5250 ARM: LPC32xx: Ethernet support ARM: LPC32xx: USB Support ARM: davinci: dm644x evm: add support for VPBE display ARM: davinci: dm644x: add support for v4l2 video display ARM: EXYNOS: Hook up JPEG PD to generic PD infrastructure ARM: EXYNOS: Hook up G2D PD to generic PD infrastructure arm: lpc32xx: phy3250: add rtc & touch device ARM: LPC32xx: clock.c: Clock registration fixes ARM: LPC32xx: clock.c: jiffies wrapping ARM: LPC32xx: clock.c: Missing header file ARM: LPC32XX: Remove broken non-static declaration ARM: LPC32xx: clock.c: Fix mutex lock issues ARM: LPC32xx: clock.c: warning fix ARM: LPC32xx: Added lpc32xx_defconfig
208 lines
6.1 KiB
C
208 lines
6.1 KiB
C
/* linux/arch/arm/mach-exynos/include/mach/map.h
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*
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* Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
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* http://www.samsung.com/
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*
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* EXYNOS4 - Memory map definitions
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __ASM_ARCH_MAP_H
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#define __ASM_ARCH_MAP_H __FILE__
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#include <plat/map-base.h>
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/*
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* EXYNOS4 UART offset is 0x10000 but the older S5P SoCs are 0x400.
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* So need to define it, and here is to avoid redefinition warning.
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*/
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#define S3C_UART_OFFSET (0x10000)
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#include <plat/map-s5p.h>
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#define EXYNOS4_PA_SYSRAM0 0x02025000
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#define EXYNOS4_PA_SYSRAM1 0x02020000
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#define EXYNOS4_PA_FIMC0 0x11800000
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#define EXYNOS4_PA_FIMC1 0x11810000
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#define EXYNOS4_PA_FIMC2 0x11820000
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#define EXYNOS4_PA_FIMC3 0x11830000
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#define EXYNOS4_PA_JPEG 0x11840000
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#define EXYNOS4_PA_G2D 0x12800000
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#define EXYNOS4_PA_I2S0 0x03830000
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#define EXYNOS4_PA_I2S1 0xE3100000
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#define EXYNOS4_PA_I2S2 0xE2A00000
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#define EXYNOS4_PA_PCM0 0x03840000
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#define EXYNOS4_PA_PCM1 0x13980000
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#define EXYNOS4_PA_PCM2 0x13990000
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#define EXYNOS4_PA_SROM_BANK(x) (0x04000000 + ((x) * 0x01000000))
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#define EXYNOS4_PA_ONENAND 0x0C000000
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#define EXYNOS4_PA_ONENAND_DMA 0x0C600000
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#define EXYNOS4_PA_CHIPID 0x10000000
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#define EXYNOS4_PA_SYSCON 0x10010000
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#define EXYNOS4_PA_PMU 0x10020000
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#define EXYNOS4_PA_CMU 0x10030000
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#define EXYNOS4_PA_SYSTIMER 0x10050000
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#define EXYNOS4_PA_WATCHDOG 0x10060000
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#define EXYNOS4_PA_RTC 0x10070000
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#define EXYNOS4_PA_KEYPAD 0x100A0000
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#define EXYNOS4_PA_DMC0 0x10400000
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#define EXYNOS4_PA_DMC1 0x10410000
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#define EXYNOS4_PA_COMBINER 0x10440000
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#define EXYNOS4_PA_GIC_CPU 0x10480000
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#define EXYNOS4_PA_GIC_DIST 0x10490000
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#define EXYNOS4_PA_COREPERI 0x10500000
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#define EXYNOS4_PA_TWD 0x10500600
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#define EXYNOS4_PA_L2CC 0x10502000
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#define EXYNOS4_PA_MDMA0 0x10810000
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#define EXYNOS4_PA_MDMA1 0x12840000
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#define EXYNOS4_PA_PDMA0 0x12680000
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#define EXYNOS4_PA_PDMA1 0x12690000
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#define EXYNOS4_PA_SYSMMU_MDMA 0x10A40000
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#define EXYNOS4_PA_SYSMMU_SSS 0x10A50000
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#define EXYNOS4_PA_SYSMMU_FIMC0 0x11A20000
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#define EXYNOS4_PA_SYSMMU_FIMC1 0x11A30000
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#define EXYNOS4_PA_SYSMMU_FIMC2 0x11A40000
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#define EXYNOS4_PA_SYSMMU_FIMC3 0x11A50000
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#define EXYNOS4_PA_SYSMMU_JPEG 0x11A60000
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#define EXYNOS4_PA_SYSMMU_FIMD0 0x11E20000
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#define EXYNOS4_PA_SYSMMU_FIMD1 0x12220000
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#define EXYNOS4_PA_SYSMMU_PCIe 0x12620000
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#define EXYNOS4_PA_SYSMMU_G2D 0x12A20000
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#define EXYNOS4_PA_SYSMMU_ROTATOR 0x12A30000
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#define EXYNOS4_PA_SYSMMU_MDMA2 0x12A40000
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#define EXYNOS4_PA_SYSMMU_TV 0x12E20000
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#define EXYNOS4_PA_SYSMMU_MFC_L 0x13620000
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#define EXYNOS4_PA_SYSMMU_MFC_R 0x13630000
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#define EXYNOS4_PA_SPI0 0x13920000
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#define EXYNOS4_PA_SPI1 0x13930000
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#define EXYNOS4_PA_SPI2 0x13940000
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#define EXYNOS4_PA_GPIO1 0x11400000
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#define EXYNOS4_PA_GPIO2 0x11000000
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#define EXYNOS4_PA_GPIO3 0x03860000
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#define EXYNOS5_PA_GPIO1 0x11400000
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#define EXYNOS5_PA_GPIO2 0x13400000
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#define EXYNOS5_PA_GPIO3 0x10D10000
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#define EXYNOS5_PA_GPIO4 0x03860000
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#define EXYNOS4_PA_MIPI_CSIS0 0x11880000
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#define EXYNOS4_PA_MIPI_CSIS1 0x11890000
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#define EXYNOS4_PA_FIMD0 0x11C00000
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#define EXYNOS4_PA_HSMMC(x) (0x12510000 + ((x) * 0x10000))
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#define EXYNOS4_PA_DWMCI 0x12550000
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#define EXYNOS4_PA_SATA 0x12560000
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#define EXYNOS4_PA_SATAPHY 0x125D0000
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#define EXYNOS4_PA_SATAPHY_CTRL 0x126B0000
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#define EXYNOS4_PA_SROMC 0x12570000
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#define EXYNOS4_PA_EHCI 0x12580000
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#define EXYNOS4_PA_OHCI 0x12590000
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#define EXYNOS4_PA_HSPHY 0x125B0000
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#define EXYNOS4_PA_MFC 0x13400000
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#define EXYNOS4_PA_UART 0x13800000
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#define EXYNOS4_PA_VP 0x12C00000
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#define EXYNOS4_PA_MIXER 0x12C10000
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#define EXYNOS4_PA_SDO 0x12C20000
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#define EXYNOS4_PA_HDMI 0x12D00000
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#define EXYNOS4_PA_IIC_HDMIPHY 0x138E0000
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#define EXYNOS4_PA_IIC(x) (0x13860000 + ((x) * 0x10000))
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#define EXYNOS4_PA_ADC 0x13910000
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#define EXYNOS4_PA_ADC1 0x13911000
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#define EXYNOS4_PA_AC97 0x139A0000
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#define EXYNOS4_PA_SPDIF 0x139B0000
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#define EXYNOS4_PA_TIMER 0x139D0000
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#define EXYNOS4_PA_SDRAM 0x40000000
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/* Compatibiltiy Defines */
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#define S3C_PA_HSMMC0 EXYNOS4_PA_HSMMC(0)
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#define S3C_PA_HSMMC1 EXYNOS4_PA_HSMMC(1)
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#define S3C_PA_HSMMC2 EXYNOS4_PA_HSMMC(2)
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#define S3C_PA_HSMMC3 EXYNOS4_PA_HSMMC(3)
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#define S3C_PA_IIC EXYNOS4_PA_IIC(0)
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#define S3C_PA_IIC1 EXYNOS4_PA_IIC(1)
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#define S3C_PA_IIC2 EXYNOS4_PA_IIC(2)
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#define S3C_PA_IIC3 EXYNOS4_PA_IIC(3)
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#define S3C_PA_IIC4 EXYNOS4_PA_IIC(4)
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#define S3C_PA_IIC5 EXYNOS4_PA_IIC(5)
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#define S3C_PA_IIC6 EXYNOS4_PA_IIC(6)
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#define S3C_PA_IIC7 EXYNOS4_PA_IIC(7)
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#define S3C_PA_RTC EXYNOS4_PA_RTC
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#define S3C_PA_WDT EXYNOS4_PA_WATCHDOG
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#define S3C_PA_UART EXYNOS4_PA_UART
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#define S3C_PA_SPI0 EXYNOS4_PA_SPI0
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#define S3C_PA_SPI1 EXYNOS4_PA_SPI1
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#define S3C_PA_SPI2 EXYNOS4_PA_SPI2
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#define S5P_PA_EHCI EXYNOS4_PA_EHCI
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#define S5P_PA_FIMC0 EXYNOS4_PA_FIMC0
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#define S5P_PA_FIMC1 EXYNOS4_PA_FIMC1
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#define S5P_PA_FIMC2 EXYNOS4_PA_FIMC2
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#define S5P_PA_FIMC3 EXYNOS4_PA_FIMC3
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#define S5P_PA_JPEG EXYNOS4_PA_JPEG
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#define S5P_PA_G2D EXYNOS4_PA_G2D
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#define S5P_PA_FIMD0 EXYNOS4_PA_FIMD0
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#define S5P_PA_HDMI EXYNOS4_PA_HDMI
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#define S5P_PA_IIC_HDMIPHY EXYNOS4_PA_IIC_HDMIPHY
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#define S5P_PA_MFC EXYNOS4_PA_MFC
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#define S5P_PA_MIPI_CSIS0 EXYNOS4_PA_MIPI_CSIS0
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#define S5P_PA_MIPI_CSIS1 EXYNOS4_PA_MIPI_CSIS1
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#define S5P_PA_MIXER EXYNOS4_PA_MIXER
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#define S5P_PA_ONENAND EXYNOS4_PA_ONENAND
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#define S5P_PA_ONENAND_DMA EXYNOS4_PA_ONENAND_DMA
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#define S5P_PA_SDO EXYNOS4_PA_SDO
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#define S5P_PA_SDRAM EXYNOS4_PA_SDRAM
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#define S5P_PA_VP EXYNOS4_PA_VP
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#define SAMSUNG_PA_ADC EXYNOS4_PA_ADC
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#define SAMSUNG_PA_ADC1 EXYNOS4_PA_ADC1
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#define SAMSUNG_PA_KEYPAD EXYNOS4_PA_KEYPAD
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/* Compatibility UART */
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#define S3C_VA_UARTx(x) (S3C_VA_UART + ((x) * S3C_UART_OFFSET))
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#define S5P_PA_UART(x) (EXYNOS4_PA_UART + ((x) * S3C_UART_OFFSET))
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#define S5P_PA_UART0 S5P_PA_UART(0)
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#define S5P_PA_UART1 S5P_PA_UART(1)
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#define S5P_PA_UART2 S5P_PA_UART(2)
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#define S5P_PA_UART3 S5P_PA_UART(3)
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#define S5P_PA_UART4 S5P_PA_UART(4)
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#define S5P_SZ_UART SZ_256
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#endif /* __ASM_ARCH_MAP_H */
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