Max Filippov f29cf77609 xtensa: add load/store exception handler ...

Memory attached to instruction bus of the xtensa CPU is only accessible
for a limited subset of opcodes. Other opcodes generate an exception
with the load/store error cause code. This property complicates use of
such systems. Provide a handler that recognizes and transparently fixes
such exceptions. The following opcodes are recognized when used outside
of FLIX bundles: l32i, l32i.n, l16ui, l16si, l8ui.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>

2023-06-13 21:56:27 -07:00

..

asm

xtensa: add load/store exception handler

2023-06-13 21:56:27 -07:00

uapi/asm

Merge tag 'mm-stable-2022-10-08' of git://git.kernel.org/pub/scm/linux/kernel/git/akpm/mm

2022-10-10 17:53:04 -07:00