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	 ec42083b98
			
		
	
	
		ec42083b98
		
	
	
	
	
		
			
			The device driver was added in v4.5 by commit dca536c433
("watchdog: add support for Sigma Designs SMP86xx/SMP87xx")
Signed-off-by: Marc Gonzalez <marc_gonzalez@sigmadesigns.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
		
	
			
		
			
				
	
	
		
			139 lines
		
	
	
		
			2.7 KiB
		
	
	
	
		
			Plaintext
		
	
	
	
	
	
			
		
		
	
	
			139 lines
		
	
	
		
			2.7 KiB
		
	
	
	
		
			Plaintext
		
	
	
	
	
	
| /*
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|  * Based on Mans Rullgard's Tango3 DT
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|  * https://github.com/mansr/linux-tangox
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|  */
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| 
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| #include <dt-bindings/interrupt-controller/arm-gic.h>
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| 
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| #define  CPU_CLK	0
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| #define  SYS_CLK	1
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| #define  USB_CLK	2
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| #define SDIO_CLK	3
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| 
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| / {
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| 	interrupt-parent = <&gic>;
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| 	#address-cells = <1>;
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| 	#size-cells = <1>;
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| 
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| 	periph_clk: periph_clk {
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| 		compatible = "fixed-factor-clock";
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| 		clocks = <&clkgen CPU_CLK>;
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| 		clock-mult = <1>;
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| 		clock-div  = <2>;
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| 		#clock-cells = <0>;
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| 	};
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| 
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| 	mpcore {
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| 		compatible = "simple-bus";
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| 		ranges = <0x00000000 0x20000000 0x2000>;
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| 		#address-cells = <1>;
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| 		#size-cells = <1>;
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| 
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| 		scu@0 {
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| 			compatible = "arm,cortex-a9-scu";
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| 			reg = <0x0 0x100>;
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| 		};
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| 
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| 		twd@600 {
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| 			compatible = "arm,cortex-a9-twd-timer";
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| 			reg = <0x600 0x10>;
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| 			interrupts = <GIC_PPI 13 IRQ_TYPE_EDGE_RISING>;
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| 			clocks = <&periph_clk>;
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| 			always-on;
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| 		};
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| 
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| 		gic: interrupt-controller@1000 {
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| 			compatible = "arm,cortex-a9-gic";
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| 			#interrupt-cells = <3>;
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| 			interrupt-controller;
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| 			reg = <0x1000 0x1000>, <0x100 0x100>;
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| 		};
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| 	};
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| 
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| 	l2cc: l2-cache-controller@20100000 {
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| 		compatible = "arm,pl310-cache";
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| 		reg = <0x20100000 0x1000>;
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| 		cache-level = <2>;
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| 		cache-unified;
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| 	};
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| 
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| 	soc {
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| 		compatible = "simple-bus";
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| 		interrupt-parent = <&irq0>;
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| 		#address-cells = <1>;
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| 		#size-cells = <1>;
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| 		ranges;
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| 
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| 		xtal: xtal {
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| 			compatible = "fixed-clock";
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| 			clock-frequency = <27000000>;
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| 			#clock-cells = <0>;
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| 		};
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| 
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| 		clkgen: clkgen@10000 {
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| 			compatible = "sigma,tango4-clkgen";
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| 			reg = <0x10000 0x100>;
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| 			clocks = <&xtal>;
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| 			#clock-cells = <1>;
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| 		};
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| 
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| 		tick-counter@10048 {
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| 			compatible = "sigma,tick-counter";
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| 			reg = <0x10048 0x4>;
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| 			clocks = <&xtal>;
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| 		};
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| 
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| 		uart: serial@10700 {
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| 			compatible = "ralink,rt2880-uart";
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| 			reg = <0x10700 0x30>;
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| 			interrupts = <1 IRQ_TYPE_LEVEL_HIGH>;
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| 			clock-frequency = <7372800>;
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| 			reg-shift = <2>;
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| 		};
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| 
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| 		watchdog@1fd00 {
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| 			compatible = "sigma,smp8759-wdt";
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| 			reg = <0x1fd00 8>;
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| 			clocks = <&xtal>;
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| 		};
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| 
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| 		eth0: ethernet@26000 {
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| 			compatible = "sigma,smp8734-ethernet";
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| 			reg = <0x26000 0x800>;
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| 			interrupts = <38 IRQ_TYPE_LEVEL_HIGH>;
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| 			clocks = <&clkgen SYS_CLK>;
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| 		};
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| 
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| 		intc: interrupt-controller@6e000 {
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| 			compatible = "sigma,smp8642-intc";
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| 			reg = <0x6e000 0x400>;
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| 			ranges = <0 0x6e000 0x400>;
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| 			interrupt-parent = <&gic>;
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| 			interrupt-controller;
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| 			#address-cells = <1>;
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| 			#size-cells = <1>;
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| 
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| 			irq0: irq0@000 {
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| 				reg = <0x000 0x100>;
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| 				interrupt-controller;
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| 				#interrupt-cells = <2>;
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| 				interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
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| 			};
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| 
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| 			irq1: irq1@100 {
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| 				reg = <0x100 0x100>;
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| 				interrupt-controller;
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| 				#interrupt-cells = <2>;
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| 				interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
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| 			};
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| 
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| 			irq2: irq2@300 {
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| 				reg = <0x300 0x100>;
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| 				interrupt-controller;
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| 				#interrupt-cells = <2>;
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| 				interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
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| 			};
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| 		};
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| 	};
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| };
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