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8ea39d960c
Merge series from David Lechner <dlechner@baylibre.com>: This series is adding support for SPI controllers and peripherals that have multiple SPI data lanes (data lanes being independent sets of SDI/SDO lines, each with their own serializer/deserializer). This series covers this specific use case: +--------------+ +---------+ | SPI | | SPI | | Controller | | ADC | | | | | | CS0 |--->| CS | | SCLK |--->| SCLK | | SDO |--->| SDI | | SDI0 |<---| SDOA | | SDI1 |<---| SDOB | | SDI2 |<---| SDOC | | SDI3 |<---| SDOD | +--------------+ +--------+ The ADC is a simultaneous sampling ADC that can convert 4 samples at the same time. It has 4 data output lines (SDOA-D) that each contain the data of one of the 4 channels. So it requires a SPI controller with 4 separate deserializers in order to receive all of the information at the same time. This should also work for the use case in [1] as well. (Some of the patches in this series were already submitted there). In that case the SPI controller is used kind of like it is two separate SPI controllers, each with its own chip select, clock, and data lines. [1]: https://lore.kernel.org/linux-spi/20250616220054.3968946-1-sean.anderson@linux.dev/ The DT bindings are a fairly straight-forward mapping of which pins on the peripheral are connected to which pins on the controller. The SPI core code parses this and makes the information available to drivers. When a peripheral driver sees that multiple data lanes are wired up, it can chose to use them when sending messages. The SPI message API is a bit higher-level than just specifying the number of data lines for a SPI transfer though. I did some research on other SPI controllers that have this feature. They tend to be the kind meant for connecting to two flash memory chips at the same time but can be used more generically as well. They generally have the option to either use one lane at a time (Sean's use case), or can mirror the same data on multiple lanes (no users of this yet) or can perform striping of a single data FIFO/DMA stream to/from the two lanes (our use case). For now, the API assumes that if you want to do mirror/striping, then you want to use all available data lanes. Otherwise, it just uses the first data lane for "normal" SPI transfers.
128 lines
2.6 KiB
YAML
128 lines
2.6 KiB
YAML
# SPDX-License-Identifier: GPL-2.0
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/spi/allwinner,sun6i-a31-spi.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Allwinner A31 SPI Controller
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allOf:
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- $ref: spi-controller.yaml
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maintainers:
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- Chen-Yu Tsai <wens@csie.org>
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- Maxime Ripard <mripard@kernel.org>
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properties:
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compatible:
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oneOf:
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- const: allwinner,sun50i-r329-spi
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- const: allwinner,sun55i-a523-spi
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- const: allwinner,sun6i-a31-spi
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- const: allwinner,sun8i-h3-spi
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- items:
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- enum:
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- allwinner,sun8i-r40-spi
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- allwinner,sun50i-h6-spi
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- allwinner,sun50i-h616-spi
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- allwinner,suniv-f1c100s-spi
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- const: allwinner,sun8i-h3-spi
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- items:
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- enum:
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- allwinner,sun20i-d1-spi
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- allwinner,sun50i-r329-spi-dbi
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- const: allwinner,sun50i-r329-spi
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- items:
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- const: allwinner,sun20i-d1-spi-dbi
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- const: allwinner,sun50i-r329-spi-dbi
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- const: allwinner,sun50i-r329-spi
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- items:
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- const: allwinner,sun55i-a523-spi-dbi
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- const: allwinner,sun55i-a523-spi
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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clocks:
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items:
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- description: Bus Clock
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- description: Module Clock
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clock-names:
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items:
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- const: ahb
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- const: mod
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resets:
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maxItems: 1
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dmas:
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items:
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- description: RX DMA Channel
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- description: TX DMA Channel
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dma-names:
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items:
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- const: rx
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- const: tx
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patternProperties:
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"^.*@[0-9a-f]+":
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type: object
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additionalProperties: true
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properties:
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reg:
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items:
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minimum: 0
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maximum: 4
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spi-rx-bus-width:
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items:
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- const: 1
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spi-tx-bus-width:
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items:
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- const: 1
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required:
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- compatible
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- reg
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- interrupts
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- clocks
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- clock-names
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unevaluatedProperties: false
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examples:
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- |
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spi1: spi@1c69000 {
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compatible = "allwinner,sun6i-a31-spi";
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reg = <0x01c69000 0x1000>;
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interrupts = <0 66 4>;
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clocks = <&ahb1_gates 21>, <&spi1_clk>;
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clock-names = "ahb", "mod";
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resets = <&ahb1_rst 21>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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- |
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spi0: spi@1c68000 {
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compatible = "allwinner,sun8i-h3-spi";
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reg = <0x01c68000 0x1000>;
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interrupts = <0 65 4>;
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clocks = <&ccu 30>, <&ccu 82>;
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clock-names = "ahb", "mod";
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dmas = <&dma 23>, <&dma 23>;
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dma-names = "rx", "tx";
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resets = <&ccu 15>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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...
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