mirror of
git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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e7cf21fbb2
Few optimization and fixes for userq fence driver.
v1:(Christian):
- Remove unnecessary comments.
- In drm_exec_init call give num_bo_handles as last parameter it would
making allocation of the array more efficient
- Handle return value of __xa_store() and improve the error handling of
amdgpu_userq_fence_driver_alloc().
v2:(Christian):
- Revert userq_xa xarray init to XA_FLAGS_LOCK_IRQ.
- move the xa_unlock before the error check of the call xa_err(__xa_store())
and moved this change to a separate patch as this is adding a missing error
handling.
- Removed the unnecessary comments.
Signed-off-by: Arunpravin Paneer Selvam <Arunpravin.PaneerSelvam@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
82 lines
2.7 KiB
C
82 lines
2.7 KiB
C
/* SPDX-License-Identifier: MIT */
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/*
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* Copyright 2023 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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*/
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#ifndef AMDGPU_USERQUEUE_H_
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#define AMDGPU_USERQUEUE_H_
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#define AMDGPU_MAX_USERQ_COUNT 512
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struct amdgpu_mqd_prop;
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struct amdgpu_userq_obj {
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void *cpu_ptr;
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uint64_t gpu_addr;
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struct amdgpu_bo *obj;
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};
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struct amdgpu_usermode_queue {
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int queue_type;
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uint64_t doorbell_handle;
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uint64_t doorbell_index;
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uint64_t flags;
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struct amdgpu_mqd_prop *userq_prop;
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struct amdgpu_userq_mgr *userq_mgr;
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struct amdgpu_vm *vm;
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struct amdgpu_userq_obj mqd;
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struct amdgpu_userq_obj db_obj;
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struct amdgpu_userq_obj fw_obj;
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struct amdgpu_userq_obj wptr_obj;
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struct xarray fence_drv_xa;
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struct amdgpu_userq_fence_driver *fence_drv;
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};
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struct amdgpu_userq_funcs {
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int (*mqd_create)(struct amdgpu_userq_mgr *uq_mgr,
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struct drm_amdgpu_userq_in *args,
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struct amdgpu_usermode_queue *queue);
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void (*mqd_destroy)(struct amdgpu_userq_mgr *uq_mgr,
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struct amdgpu_usermode_queue *uq);
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};
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/* Usermode queues for gfx */
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struct amdgpu_userq_mgr {
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struct idr userq_idr;
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struct mutex userq_mutex;
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struct amdgpu_device *adev;
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};
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int amdgpu_userq_ioctl(struct drm_device *dev, void *data, struct drm_file *filp);
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int amdgpu_userq_mgr_init(struct amdgpu_userq_mgr *userq_mgr, struct amdgpu_device *adev);
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void amdgpu_userq_mgr_fini(struct amdgpu_userq_mgr *userq_mgr);
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int amdgpu_userqueue_create_object(struct amdgpu_userq_mgr *uq_mgr,
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struct amdgpu_userq_obj *userq_obj,
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int size);
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void amdgpu_userqueue_destroy_object(struct amdgpu_userq_mgr *uq_mgr,
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struct amdgpu_userq_obj *userq_obj);
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#endif
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