mirror of
git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
synced 2025-09-04 20:19:47 +08:00
9f32a03e3e
new machine. The migration process took longer than expected and disrupted my
workflow, but I think I'm ready to go and things should speed up from here.
Luckily, this has been a semi-quiet cycle. The core framework remains unchanged
this time around. In terms of shiny new code though, we have support for the
SpacemiT K1 SoC, Sophgo SG2044, and T-HEAD TH1520 VO clk drivers joining the
usual silicon players like Qualcomm, Samsung, Allwinner, and Renesas.
Surprisingly, the Qualcomm pile was smaller than usual but that is likely
because they put one SoC support inside a driver for a different SoC that is
very similar. Other than all those new clk drivers there are the usual clk data
updates to fix parents, frequency tables, and add missing clks along with some
Kconfig changes to make compile testing simpler and even more DT binding
conversions to boot. The exciting part is still the new SoC support like
SpacemiT and Sophgo support though, which really dominate the diffstat because
they introduce a whole new silicon vendor clk driver.
New Drivers:
- Camera clock controller driver for Qualcomm QCS8300
- DE (display engine) 3.3 clocks on Allwinner H616
- Samsung ExynosAutov920 CPU cluster CL0, CL1 and CL2 clock controllers
- Video Output (VO) subsystem clk controller in the T-HEAD TH1520 SoC
- Clock driver for Sophgo SG2044
- Clock driver for SpacemiT K1 SoC
- Renesas RZ/V2N (R9A09G056) SoC clk driver
Updates:
- Correct data in various SoC clk drivers
- Allow clkaN to be optional in the Qualcomm RPMh clock controller
driver if command db doesn't define it
- Change Kconfig options to not enable by default during compile testing
- Add missing clks in various SoC clk drivers
- Remove some duplicate clk DT bindings and convert some more to YAML
-----BEGIN PGP SIGNATURE-----
iQJIBAABCAAyFiEE9L57QeeUxqYDyoaDrQKIl8bklSUFAmg45JcUHHN3Ym95ZEBj
aHJvbWl1bS5vcmcACgkQrQKIl8bklSUvJhAAqukvBxlTu9bh1kpTL3GYRtjOIjgl
J8RUUfpfBXdXGfysiFBx6isMpkzfSBQ3NbyYEUZG9LZYxss6PiM1da7+/DwmtxJA
Ovwc05LVK+t7e0Svpc5UwQHTFUhgdnbuUBw1XQwL8FwzLq+3sSXZwwfapN/SuBfZ
TG6YtMNN89vVI8/B8sAqbiGe72V6ueq+sppmCv3rhLnAsjinBvcQozsoiKyalQG8
cd7gL+jy02R0XUgCPAxITEpXuv45UhksVJw84HBMjlIICOLo753+BY50PnUKRNSV
VwSXGLNRLxUJAgnUFmtALWX4SgcIoHKmdshG2wUAFAcWBtosflF52MAVevsuR/Pb
4xlKzmUio8WmO0unb20uAidM53sjr8NfLBc4PkHoVoJ0bnkefXkRuAealBcnBjJa
LQI++mOjIirY7hC13K53C1tfgiiGVgQWogr6/nYIY+hA6S/yOcNfTsZE/cNjQJtP
RbEDxKGgqSOHKxD9FSQGKSnvQZQ+dtw3IRXkfIczEV2NqOiVQyBTy6/wm6sx3Jcr
IJIIdwLdcEPfVO1iTKnjXvPsKgeHY5ijaCz/t8uOM6MvaOhlfb0fOH7eq8c7drtp
y+KW1iT28GgEAUxWdIePWDV7IOnLfS64Lf9N4ry7xRF2KrdZKJSGfHWpQozhi+NE
bNo0PKMMadXLiZo=
=bEFK
-----END PGP SIGNATURE-----
Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
Pull clk updates from Stephen Boyd:
"This has been a semi-quiet cycle. The core framework remains unchanged
this time around.
In terms of shiny new code though, we have support for the SpacemiT K1
SoC, Sophgo SG2044, and T-HEAD TH1520 VO clk drivers joining the usual
silicon players like Qualcomm, Samsung, Allwinner, and Renesas.
Surprisingly, the Qualcomm pile was smaller than usual but that is
likely because they put one SoC support inside a driver for a
different SoC that is very similar.
Other than all those new clk drivers there are the usual clk data
updates to fix parents, frequency tables, and add missing clks along
with some Kconfig changes to make compile testing simpler and even
more DT binding conversions to boot.
The exciting part is still the new SoC support like SpacemiT and
Sophgo support though, which really dominate the diffstat because they
introduce a whole new silicon vendor clk driver.
New Drivers:
- Camera clock controller driver for Qualcomm QCS8300
- DE (display engine) 3.3 clocks on Allwinner H616
- Samsung ExynosAutov920 CPU cluster CL0, CL1 and CL2 clock controllers
- Video Output (VO) subsystem clk controller in the T-HEAD TH1520 SoC
- Clock driver for Sophgo SG2044
- Clock driver for SpacemiT K1 SoC
- Renesas RZ/V2N (R9A09G056) SoC clk driver
Updates:
- Correct data in various SoC clk drivers
- Allow clkaN to be optional in the Qualcomm RPMh clock controller
driver if command db doesn't define it
- Change Kconfig options to not enable by default during compile
testing
- Add missing clks in various SoC clk drivers
- Remove some duplicate clk DT bindings and convert some more to
YAML"
* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (93 commits)
clk: qcom: gcc-x1e80100: Set FORCE MEM CORE for UFS clocks
clk: qcom: gcc: Set FORCE_MEM_CORE_ON for gcc_ufs_axi_clk for 8650/8750
clk: qcom: rpmh: make clkaN optional
clk: qcom: Add support for Camera Clock Controller on QCS8300
clk: rockchip: rk3528: add slab.h header include
clk: rockchip: rk3576: add missing slab.h include
clk: meson: Do not enable by default during compile testing
clk: meson-g12a: add missing fclk_div2 to spicc
clk: qcom: gcc-msm8939: Fix mclk0 & mclk1 for 24 MHz
clk: rockchip: rename gate-grf clk file
clk: rockchip: rename branch_muxgrf to branch_grf_mux
clk: sunxi-ng: ccu: add Display Engine 3.3 (DE33) support
dt-bindings: allwinner: add H616 DE33 clock binding
clk: samsung: correct clock summary for hsi1 block
dt-bindings: clock: add SM6350 QCOM video clock bindings
clk: rockchip: Pass NULL as reg pointer when registering GRF MMC clocks
clk: sunxi-ng: h616: Add LVDS reset for LCD TCON
dt-bindings: clock: sun50i-h616-ccu: Add LVDS reset
clk: rockchip: rk3036: mark ddrphy as critical
clk: rockchip: rk3036: fix implementation of usb480m clock mux
...
|
||
|---|---|---|
| .. | ||
| assert.h | ||
| attributes.h | ||
| clk.h | ||
| device.h | ||
| of.h | ||
| platform_device.h | ||
| resource.h | ||
| skbuff.h | ||
| static_stub.h | ||
| test-bug.h | ||
| test.h | ||
| try-catch.h | ||
| visibility.h | ||