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		5457982641
		
	
	
	
	
		
			
			Signed-off-by: David Howells <dhowells@redhat.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Michael Kerrisk <mtk.manpages@gmail.com> Acked-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com> Acked-by: Dave Jones <davej@redhat.com>
		
			
				
	
	
		
			48 lines
		
	
	
		
			2.2 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			48 lines
		
	
	
		
			2.2 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * psr.h: This file holds the macros for masking off various parts of
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|  *        the processor status register on the Sparc. This is valid
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|  *        for Version 8. On the V9 this is renamed to the PSTATE
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|  *        register and its members are accessed as fields like
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|  *        PSTATE.PRIV for the current CPU privilege level.
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|  *
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|  * Copyright (C) 1994 David S. Miller (davem@caip.rutgers.edu)
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|  */
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| 
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| #ifndef _UAPI__LINUX_SPARC_PSR_H
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| #define _UAPI__LINUX_SPARC_PSR_H
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| 
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| /* The Sparc PSR fields are laid out as the following:
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|  *
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|  *  ------------------------------------------------------------------------
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|  *  | impl  | vers  | icc   | resv  | EC | EF | PIL  | S | PS | ET |  CWP  |
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|  *  | 31-28 | 27-24 | 23-20 | 19-14 | 13 | 12 | 11-8 | 7 | 6  | 5  |  4-0  |
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|  *  ------------------------------------------------------------------------
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|  */
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| #define PSR_CWP     0x0000001f         /* current window pointer     */
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| #define PSR_ET      0x00000020         /* enable traps field         */
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| #define PSR_PS      0x00000040         /* previous privilege level   */
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| #define PSR_S       0x00000080         /* current privilege level    */
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| #define PSR_PIL     0x00000f00         /* processor interrupt level  */
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| #define PSR_EF      0x00001000         /* enable floating point      */
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| #define PSR_EC      0x00002000         /* enable co-processor        */
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| #define PSR_SYSCALL 0x00004000         /* inside of a syscall        */
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| #define PSR_LE      0x00008000         /* SuperSparcII little-endian */
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| #define PSR_ICC     0x00f00000         /* integer condition codes    */
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| #define PSR_C       0x00100000         /* carry bit                  */
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| #define PSR_V       0x00200000         /* overflow bit               */
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| #define PSR_Z       0x00400000         /* zero bit                   */
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| #define PSR_N       0x00800000         /* negative bit               */
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| #define PSR_VERS    0x0f000000         /* cpu-version field          */
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| #define PSR_IMPL    0xf0000000         /* cpu-implementation field   */
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| 
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| #define PSR_VERS_SHIFT		24
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| #define PSR_IMPL_SHIFT		28
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| #define PSR_VERS_SHIFTED_MASK	0xf
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| #define PSR_IMPL_SHIFTED_MASK	0xf
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| 
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| #define PSR_IMPL_TI		0x4
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| #define PSR_IMPL_LEON		0xf
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| 
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| 
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| #endif /* _UAPI__LINUX_SPARC_PSR_H */
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