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a439fe51a1
The majority of this patch was created by the following script: *** ASM=arch/sparc/include/asm mkdir -p $ASM git mv include/asm-sparc64/ftrace.h $ASM git rm include/asm-sparc64/* git mv include/asm-sparc/* $ASM sed -ie 's/asm-sparc64/asm/g' $ASM/* sed -ie 's/asm-sparc/asm/g' $ASM/* *** The rest was an update of the top-level Makefile to use sparc for header files when sparc64 is being build. And a small fixlet to pick up the correct unistd.h from sparc64 code. Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
110 lines
3.7 KiB
C
110 lines
3.7 KiB
C
#ifndef _SPARC64_UPA_H
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#define _SPARC64_UPA_H
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#include <asm/asi.h>
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/* UPA level registers and defines. */
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/* UPA Config Register */
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#define UPA_CONFIG_RESV 0xffffffffc0000000 /* Reserved. */
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#define UPA_CONFIG_PCON 0x000000003fc00000 /* Depth of various sys queues. */
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#define UPA_CONFIG_MID 0x00000000003e0000 /* Module ID. */
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#define UPA_CONFIG_PCAP 0x000000000001ffff /* Port Capabilities. */
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/* UPA Port ID Register */
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#define UPA_PORTID_FNP 0xff00000000000000 /* Hardcoded to 0xfc on ultra. */
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#define UPA_PORTID_RESV 0x00fffff800000000 /* Reserved. */
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#define UPA_PORTID_ECCVALID 0x0000000400000000 /* Zero if mod can generate ECC */
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#define UPA_PORTID_ONEREAD 0x0000000200000000 /* Set if mod generates P_RASB */
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#define UPA_PORTID_PINTRDQ 0x0000000180000000 /* # outstanding P_INT_REQ's */
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#define UPA_PORTID_PREQDQ 0x000000007e000000 /* slave-wr's to mod supported */
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#define UPA_PORTID_PREQRD 0x0000000001e00000 /* # incoming P_REQ's supported */
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#define UPA_PORTID_UPACAP 0x00000000001f0000 /* UPA capabilities of mod */
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#define UPA_PORTID_ID 0x000000000000ffff /* Module Identification bits */
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/* UPA I/O space accessors */
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#if defined(__KERNEL__) && !defined(__ASSEMBLY__)
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static inline unsigned char _upa_readb(unsigned long addr)
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{
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unsigned char ret;
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__asm__ __volatile__("lduba\t[%1] %2, %0\t/* upa_readb */"
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: "=r" (ret)
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: "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
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return ret;
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}
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static inline unsigned short _upa_readw(unsigned long addr)
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{
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unsigned short ret;
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__asm__ __volatile__("lduha\t[%1] %2, %0\t/* upa_readw */"
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: "=r" (ret)
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: "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
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return ret;
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}
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static inline unsigned int _upa_readl(unsigned long addr)
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{
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unsigned int ret;
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__asm__ __volatile__("lduwa\t[%1] %2, %0\t/* upa_readl */"
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: "=r" (ret)
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: "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
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return ret;
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}
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static inline unsigned long _upa_readq(unsigned long addr)
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{
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unsigned long ret;
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__asm__ __volatile__("ldxa\t[%1] %2, %0\t/* upa_readq */"
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: "=r" (ret)
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: "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
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return ret;
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}
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static inline void _upa_writeb(unsigned char b, unsigned long addr)
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{
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__asm__ __volatile__("stba\t%0, [%1] %2\t/* upa_writeb */"
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: /* no outputs */
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: "r" (b), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
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}
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static inline void _upa_writew(unsigned short w, unsigned long addr)
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{
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__asm__ __volatile__("stha\t%0, [%1] %2\t/* upa_writew */"
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: /* no outputs */
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: "r" (w), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
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}
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static inline void _upa_writel(unsigned int l, unsigned long addr)
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{
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__asm__ __volatile__("stwa\t%0, [%1] %2\t/* upa_writel */"
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: /* no outputs */
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: "r" (l), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
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}
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static inline void _upa_writeq(unsigned long q, unsigned long addr)
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{
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__asm__ __volatile__("stxa\t%0, [%1] %2\t/* upa_writeq */"
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: /* no outputs */
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: "r" (q), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
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}
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#define upa_readb(__addr) (_upa_readb((unsigned long)(__addr)))
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#define upa_readw(__addr) (_upa_readw((unsigned long)(__addr)))
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#define upa_readl(__addr) (_upa_readl((unsigned long)(__addr)))
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#define upa_readq(__addr) (_upa_readq((unsigned long)(__addr)))
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#define upa_writeb(__b, __addr) (_upa_writeb((__b), (unsigned long)(__addr)))
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#define upa_writew(__w, __addr) (_upa_writew((__w), (unsigned long)(__addr)))
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#define upa_writel(__l, __addr) (_upa_writel((__l), (unsigned long)(__addr)))
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#define upa_writeq(__q, __addr) (_upa_writeq((__q), (unsigned long)(__addr)))
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#endif /* __KERNEL__ && !__ASSEMBLY__ */
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#endif /* !(_SPARC64_UPA_H) */
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