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ed515b6898
With split pmd page table lock enabled, we don't use mm->page_table_lock when
updating pmd entries. This patch update hugetlb path to use the right lock
when inserting huge page directory entries into page table.
ex: if we are using hugepd and inserting hugepd entry at the pmd level, we
use pmd_lockptr, which based on config can be split pmd lock.
For update huge page directory entries itself we use mm->page_table_lock. We
do have a helper huge_pte_lockptr() for that.
Fixes: 675d99529 ("powerpc/book3s64: Enable split pmd ptlock")
Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
308 lines
8.2 KiB
C
308 lines
8.2 KiB
C
/*
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* This file contains common routines for dealing with free of page tables
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* Along with common page table handling code
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*
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* Derived from arch/powerpc/mm/tlb_64.c:
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* Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
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*
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* Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
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* and Cort Dougan (PReP) (cort@cs.nmt.edu)
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* Copyright (C) 1996 Paul Mackerras
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*
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* Derived from "arch/i386/mm/init.c"
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* Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds
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*
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* Dave Engebretsen <engebret@us.ibm.com>
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* Rework for PPC64 port.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#include <linux/kernel.h>
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#include <linux/gfp.h>
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#include <linux/mm.h>
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#include <linux/percpu.h>
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#include <linux/hardirq.h>
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#include <linux/hugetlb.h>
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#include <asm/pgalloc.h>
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#include <asm/tlbflush.h>
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#include <asm/tlb.h>
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static inline int is_exec_fault(void)
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{
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return current->thread.regs && TRAP(current->thread.regs) == 0x400;
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}
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/* We only try to do i/d cache coherency on stuff that looks like
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* reasonably "normal" PTEs. We currently require a PTE to be present
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* and we avoid _PAGE_SPECIAL and cache inhibited pte. We also only do that
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* on userspace PTEs
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*/
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static inline int pte_looks_normal(pte_t pte)
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{
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#if defined(CONFIG_PPC_BOOK3S_64)
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if ((pte_val(pte) & (_PAGE_PRESENT | _PAGE_SPECIAL)) == _PAGE_PRESENT) {
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if (pte_ci(pte))
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return 0;
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if (pte_user(pte))
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return 1;
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}
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return 0;
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#else
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return (pte_val(pte) &
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(_PAGE_PRESENT | _PAGE_SPECIAL | _PAGE_NO_CACHE | _PAGE_USER |
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_PAGE_PRIVILEGED)) ==
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(_PAGE_PRESENT | _PAGE_USER);
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#endif
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}
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static struct page *maybe_pte_to_page(pte_t pte)
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{
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unsigned long pfn = pte_pfn(pte);
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struct page *page;
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if (unlikely(!pfn_valid(pfn)))
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return NULL;
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page = pfn_to_page(pfn);
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if (PageReserved(page))
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return NULL;
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return page;
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}
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#if defined(CONFIG_PPC_STD_MMU) || _PAGE_EXEC == 0
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/* Server-style MMU handles coherency when hashing if HW exec permission
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* is supposed per page (currently 64-bit only). If not, then, we always
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* flush the cache for valid PTEs in set_pte. Embedded CPU without HW exec
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* support falls into the same category.
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*/
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static pte_t set_pte_filter(pte_t pte)
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{
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if (radix_enabled())
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return pte;
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pte = __pte(pte_val(pte) & ~_PAGE_HPTEFLAGS);
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if (pte_looks_normal(pte) && !(cpu_has_feature(CPU_FTR_COHERENT_ICACHE) ||
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cpu_has_feature(CPU_FTR_NOEXECUTE))) {
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struct page *pg = maybe_pte_to_page(pte);
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if (!pg)
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return pte;
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if (!test_bit(PG_arch_1, &pg->flags)) {
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flush_dcache_icache_page(pg);
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set_bit(PG_arch_1, &pg->flags);
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}
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}
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return pte;
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}
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static pte_t set_access_flags_filter(pte_t pte, struct vm_area_struct *vma,
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int dirty)
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{
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return pte;
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}
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#else /* defined(CONFIG_PPC_STD_MMU) || _PAGE_EXEC == 0 */
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/* Embedded type MMU with HW exec support. This is a bit more complicated
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* as we don't have two bits to spare for _PAGE_EXEC and _PAGE_HWEXEC so
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* instead we "filter out" the exec permission for non clean pages.
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*/
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static pte_t set_pte_filter(pte_t pte)
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{
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struct page *pg;
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/* No exec permission in the first place, move on */
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if (!(pte_val(pte) & _PAGE_EXEC) || !pte_looks_normal(pte))
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return pte;
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/* If you set _PAGE_EXEC on weird pages you're on your own */
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pg = maybe_pte_to_page(pte);
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if (unlikely(!pg))
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return pte;
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/* If the page clean, we move on */
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if (test_bit(PG_arch_1, &pg->flags))
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return pte;
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/* If it's an exec fault, we flush the cache and make it clean */
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if (is_exec_fault()) {
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flush_dcache_icache_page(pg);
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set_bit(PG_arch_1, &pg->flags);
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return pte;
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}
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/* Else, we filter out _PAGE_EXEC */
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return __pte(pte_val(pte) & ~_PAGE_EXEC);
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}
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static pte_t set_access_flags_filter(pte_t pte, struct vm_area_struct *vma,
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int dirty)
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{
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struct page *pg;
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/* So here, we only care about exec faults, as we use them
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* to recover lost _PAGE_EXEC and perform I$/D$ coherency
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* if necessary. Also if _PAGE_EXEC is already set, same deal,
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* we just bail out
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*/
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if (dirty || (pte_val(pte) & _PAGE_EXEC) || !is_exec_fault())
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return pte;
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#ifdef CONFIG_DEBUG_VM
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/* So this is an exec fault, _PAGE_EXEC is not set. If it was
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* an error we would have bailed out earlier in do_page_fault()
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* but let's make sure of it
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*/
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if (WARN_ON(!(vma->vm_flags & VM_EXEC)))
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return pte;
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#endif /* CONFIG_DEBUG_VM */
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/* If you set _PAGE_EXEC on weird pages you're on your own */
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pg = maybe_pte_to_page(pte);
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if (unlikely(!pg))
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goto bail;
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/* If the page is already clean, we move on */
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if (test_bit(PG_arch_1, &pg->flags))
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goto bail;
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/* Clean the page and set PG_arch_1 */
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flush_dcache_icache_page(pg);
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set_bit(PG_arch_1, &pg->flags);
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bail:
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return __pte(pte_val(pte) | _PAGE_EXEC);
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}
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#endif /* !(defined(CONFIG_PPC_STD_MMU) || _PAGE_EXEC == 0) */
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/*
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* set_pte stores a linux PTE into the linux page table.
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*/
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void set_pte_at(struct mm_struct *mm, unsigned long addr, pte_t *ptep,
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pte_t pte)
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{
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/*
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* When handling numa faults, we already have the pte marked
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* _PAGE_PRESENT, but we can be sure that it is not in hpte.
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* Hence we can use set_pte_at for them.
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*/
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VM_WARN_ON(pte_present(*ptep) && !pte_protnone(*ptep));
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/* Add the pte bit when trying to set a pte */
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pte = __pte(pte_val(pte) | _PAGE_PTE);
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/* Note: mm->context.id might not yet have been assigned as
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* this context might not have been activated yet when this
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* is called.
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*/
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pte = set_pte_filter(pte);
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/* Perform the setting of the PTE */
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__set_pte_at(mm, addr, ptep, pte, 0);
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}
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/*
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* This is called when relaxing access to a PTE. It's also called in the page
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* fault path when we don't hit any of the major fault cases, ie, a minor
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* update of _PAGE_ACCESSED, _PAGE_DIRTY, etc... The generic code will have
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* handled those two for us, we additionally deal with missing execute
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* permission here on some processors
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*/
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int ptep_set_access_flags(struct vm_area_struct *vma, unsigned long address,
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pte_t *ptep, pte_t entry, int dirty)
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{
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int changed;
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entry = set_access_flags_filter(entry, vma, dirty);
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changed = !pte_same(*(ptep), entry);
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if (changed) {
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assert_pte_locked(vma->vm_mm, address);
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__ptep_set_access_flags(vma, ptep, entry,
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address, mmu_virtual_psize);
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}
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return changed;
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}
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#ifdef CONFIG_HUGETLB_PAGE
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extern int huge_ptep_set_access_flags(struct vm_area_struct *vma,
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unsigned long addr, pte_t *ptep,
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pte_t pte, int dirty)
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{
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#ifdef HUGETLB_NEED_PRELOAD
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/*
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* The "return 1" forces a call of update_mmu_cache, which will write a
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* TLB entry. Without this, platforms that don't do a write of the TLB
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* entry in the TLB miss handler asm will fault ad infinitum.
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*/
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ptep_set_access_flags(vma, addr, ptep, pte, dirty);
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return 1;
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#else
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int changed, psize;
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pte = set_access_flags_filter(pte, vma, dirty);
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changed = !pte_same(*(ptep), pte);
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if (changed) {
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#ifdef CONFIG_PPC_BOOK3S_64
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struct hstate *h = hstate_vma(vma);
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psize = hstate_get_psize(h);
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#ifdef CONFIG_DEBUG_VM
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assert_spin_locked(huge_pte_lockptr(h, vma->vm_mm, ptep));
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#endif
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#else
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/*
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* Not used on non book3s64 platforms. But 8xx
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* can possibly use tsize derived from hstate.
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*/
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psize = 0;
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#endif
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__ptep_set_access_flags(vma, ptep, pte, addr, psize);
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}
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return changed;
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#endif
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}
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#endif /* CONFIG_HUGETLB_PAGE */
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#ifdef CONFIG_DEBUG_VM
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void assert_pte_locked(struct mm_struct *mm, unsigned long addr)
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{
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pgd_t *pgd;
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pud_t *pud;
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pmd_t *pmd;
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if (mm == &init_mm)
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return;
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pgd = mm->pgd + pgd_index(addr);
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BUG_ON(pgd_none(*pgd));
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pud = pud_offset(pgd, addr);
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BUG_ON(pud_none(*pud));
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pmd = pmd_offset(pud, addr);
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/*
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* khugepaged to collapse normal pages to hugepage, first set
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* pmd to none to force page fault/gup to take mmap_sem. After
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* pmd is set to none, we do a pte_clear which does this assertion
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* so if we find pmd none, return.
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*/
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if (pmd_none(*pmd))
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return;
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BUG_ON(!pmd_present(*pmd));
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assert_spin_locked(pte_lockptr(mm, pmd));
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}
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#endif /* CONFIG_DEBUG_VM */
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unsigned long vmalloc_to_phys(void *va)
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{
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unsigned long pfn = vmalloc_to_pfn(va);
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BUG_ON(!pfn);
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return __pa(pfn_to_kaddr(pfn)) + offset_in_page(va);
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}
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EXPORT_SYMBOL_GPL(vmalloc_to_phys);
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