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a1da27d0c3
Add documentation for the Rockchip MIPI CSI-2 Receiver. Signed-off-by: Michael Riesch <michael.riesch@wolfvision.net> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Michael Riesch <michael.riesch@collabora.com> Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com> Signed-off-by: Hans Verkuil <hverkuil+cisco@kernel.org>
142 lines
3.4 KiB
YAML
142 lines
3.4 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/media/rockchip,rk3568-mipi-csi2.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Rockchip MIPI CSI-2 Receiver
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maintainers:
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- Michael Riesch <michael.riesch@collabora.com>
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description:
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The Rockchip MIPI CSI-2 Receiver is a CSI-2 bridge with one input port and
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one output port. It receives the data with the help of an external MIPI PHY
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(C-PHY or D-PHY) and passes it to the Rockchip Video Capture (VICAP) block.
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properties:
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compatible:
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enum:
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- rockchip,rk3568-mipi-csi2
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reg:
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maxItems: 1
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interrupts:
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items:
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- description: Interrupt that signals changes in CSI2HOST_ERR1.
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- description: Interrupt that signals changes in CSI2HOST_ERR2.
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interrupt-names:
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items:
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- const: err1
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- const: err2
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clocks:
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maxItems: 1
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phys:
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maxItems: 1
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description: MIPI C-PHY or D-PHY.
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ports:
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$ref: /schemas/graph.yaml#/properties/ports
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properties:
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port@0:
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$ref: /schemas/graph.yaml#/$defs/port-base
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unevaluatedProperties: false
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description: Input port node. Connect to e.g., a MIPI CSI-2 image sensor.
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properties:
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endpoint:
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$ref: video-interfaces.yaml#
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unevaluatedProperties: false
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properties:
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bus-type:
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enum:
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- 1 # MEDIA_BUS_TYPE_CSI2_CPHY
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- 4 # MEDIA_BUS_TYPE_CSI2_DPHY
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data-lanes:
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minItems: 1
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maxItems: 4
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required:
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- bus-type
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- data-lanes
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port@1:
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$ref: /schemas/graph.yaml#/properties/port
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description: Output port connected to a Rockchip VICAP port.
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required:
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- port@0
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- port@1
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power-domains:
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maxItems: 1
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resets:
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maxItems: 1
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required:
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- compatible
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- reg
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- clocks
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- phys
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- ports
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- power-domains
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- resets
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/clock/rk3568-cru.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/media/video-interfaces.h>
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#include <dt-bindings/power/rk3568-power.h>
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soc {
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interrupt-parent = <&gic>;
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#address-cells = <2>;
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#size-cells = <2>;
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csi: csi@fdfb0000 {
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compatible = "rockchip,rk3568-mipi-csi2";
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reg = <0x0 0xfdfb0000 0x0 0x10000>;
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interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "err1", "err2";
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clocks = <&cru PCLK_CSI2HOST1>;
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phys = <&csi_dphy>;
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power-domains = <&power RK3568_PD_VI>;
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resets = <&cru SRST_P_CSI2HOST1>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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csi_in: port@0 {
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reg = <0>;
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csi_input: endpoint {
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bus-type = <MEDIA_BUS_TYPE_CSI2_DPHY>;
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data-lanes = <1 2 3 4>;
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remote-endpoint = <&imx415_output>;
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};
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};
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csi_out: port@1 {
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reg = <1>;
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csi_output: endpoint {
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remote-endpoint = <&vicap_mipi_input>;
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};
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};
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};
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};
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};
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