mirror of
git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
synced 2025-09-04 20:19:47 +08:00
If the normal reset methods don't work well, attempt to escalate to ever increasing methods. TOP reset will only be available for SC (and presumably higher) devices, and still needs to be filled in. Signed-off-by: Johannes Berg <johannes.berg@intel.com> Signed-off-by: Miri Korenblit <miriam.rachel.korenblit@intel.com> Link: https://patch.msgid.link/20241231135726.804e005403d8.I9558f09cd68eec16b02373b1e47adafd28fdffa3@changeid Signed-off-by: Johannes Berg <johannes.berg@intel.com>
785 lines
20 KiB
C
785 lines
20 KiB
C
// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
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/*
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* Copyright (C) 2015 Intel Mobile Communications GmbH
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* Copyright (C) 2016-2017 Intel Deutschland GmbH
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* Copyright (C) 2019-2021, 2023-2024 Intel Corporation
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*/
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#include <linux/kernel.h>
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#include <linux/bsearch.h>
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#include <linux/list.h>
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#include "fw/api/tx.h"
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#include "iwl-trans.h"
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#include "iwl-drv.h"
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#include "iwl-fh.h"
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#include <linux/dmapool.h>
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#include "fw/api/commands.h"
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#include "pcie/internal.h"
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#include "iwl-context-info-gen3.h"
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struct iwl_trans_dev_restart_data {
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struct list_head list;
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unsigned int restart_count;
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time64_t last_error;
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char name[];
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};
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static LIST_HEAD(restart_data_list);
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static DEFINE_SPINLOCK(restart_data_lock);
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static struct iwl_trans_dev_restart_data *
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iwl_trans_get_restart_data(struct device *dev)
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{
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struct iwl_trans_dev_restart_data *tmp, *data = NULL;
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const char *name = dev_name(dev);
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spin_lock(&restart_data_lock);
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list_for_each_entry(tmp, &restart_data_list, list) {
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if (strcmp(tmp->name, name))
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continue;
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data = tmp;
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break;
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}
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spin_unlock(&restart_data_lock);
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if (data)
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return data;
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data = kzalloc(struct_size(data, name, strlen(name) + 1), GFP_ATOMIC);
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if (!data)
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return NULL;
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strcpy(data->name, name);
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spin_lock(&restart_data_lock);
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list_add_tail(&data->list, &restart_data_list);
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spin_unlock(&restart_data_lock);
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return data;
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}
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static void iwl_trans_inc_restart_count(struct device *dev)
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{
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struct iwl_trans_dev_restart_data *data;
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data = iwl_trans_get_restart_data(dev);
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if (data) {
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data->last_error = ktime_get_boottime_seconds();
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data->restart_count++;
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}
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}
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void iwl_trans_free_restart_list(void)
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{
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struct iwl_trans_dev_restart_data *tmp;
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while ((tmp = list_first_entry_or_null(&restart_data_list,
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typeof(*tmp), list))) {
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list_del(&tmp->list);
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kfree(tmp);
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}
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}
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struct iwl_trans_reprobe {
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struct device *dev;
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struct work_struct work;
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};
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static void iwl_trans_reprobe_wk(struct work_struct *wk)
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{
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struct iwl_trans_reprobe *reprobe;
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reprobe = container_of(wk, typeof(*reprobe), work);
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if (device_reprobe(reprobe->dev))
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dev_err(reprobe->dev, "reprobe failed!\n");
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put_device(reprobe->dev);
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kfree(reprobe);
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module_put(THIS_MODULE);
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}
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#define IWL_TRANS_RESET_OK_TIME 180 /* seconds */
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static enum iwl_reset_mode
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iwl_trans_determine_restart_mode(struct iwl_trans *trans)
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{
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struct iwl_trans_dev_restart_data *data;
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enum iwl_reset_mode at_least = 0;
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unsigned int index;
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static const enum iwl_reset_mode escalation_list[] = {
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IWL_RESET_MODE_SW_RESET,
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IWL_RESET_MODE_REPROBE,
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IWL_RESET_MODE_REPROBE,
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IWL_RESET_MODE_FUNC_RESET,
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/* FIXME: add TOP reset */
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IWL_RESET_MODE_PROD_RESET,
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/* FIXME: add TOP reset */
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IWL_RESET_MODE_PROD_RESET,
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/* FIXME: add TOP reset */
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IWL_RESET_MODE_PROD_RESET,
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};
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if (trans->restart.during_reset)
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at_least = IWL_RESET_MODE_REPROBE;
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data = iwl_trans_get_restart_data(trans->dev);
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if (!data)
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return at_least;
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if (ktime_get_boottime_seconds() - data->last_error >=
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IWL_TRANS_RESET_OK_TIME)
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data->restart_count = 0;
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index = data->restart_count;
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if (index >= ARRAY_SIZE(escalation_list))
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index = ARRAY_SIZE(escalation_list) - 1;
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return max(at_least, escalation_list[index]);
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}
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#define IWL_TRANS_RESET_DELAY (HZ * 60)
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static void iwl_trans_restart_wk(struct work_struct *wk)
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{
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struct iwl_trans *trans = container_of(wk, typeof(*trans), restart.wk);
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struct iwl_trans_reprobe *reprobe;
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enum iwl_reset_mode mode;
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if (!trans->op_mode)
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return;
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/* might have been scheduled before marked as dead, re-check */
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if (test_bit(STATUS_TRANS_DEAD, &trans->status))
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return;
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iwl_op_mode_dump_error(trans->op_mode, &trans->restart.mode);
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/*
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* If the opmode stopped the device while we were trying to dump and
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* reset, then we'll have done the dump already (synchronized by the
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* opmode lock that it will acquire in iwl_op_mode_dump_error()) and
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* managed that via trans->restart.mode.
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* Additionally, make sure that in such a case we won't attempt to do
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* any resets now, since it's no longer requested.
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*/
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if (!test_and_clear_bit(STATUS_RESET_PENDING, &trans->status))
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return;
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if (!iwlwifi_mod_params.fw_restart)
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return;
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mode = iwl_trans_determine_restart_mode(trans);
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iwl_trans_inc_restart_count(trans->dev);
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switch (mode) {
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case IWL_RESET_MODE_SW_RESET:
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IWL_ERR(trans, "Device error - SW reset\n");
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iwl_trans_opmode_sw_reset(trans, trans->restart.mode.type);
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break;
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case IWL_RESET_MODE_REPROBE:
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IWL_ERR(trans, "Device error - reprobe!\n");
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/*
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* get a module reference to avoid doing this while unloading
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* anyway and to avoid scheduling a work with code that's
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* being removed.
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*/
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if (!try_module_get(THIS_MODULE)) {
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IWL_ERR(trans, "Module is being unloaded - abort\n");
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return;
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}
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reprobe = kzalloc(sizeof(*reprobe), GFP_KERNEL);
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if (!reprobe) {
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module_put(THIS_MODULE);
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return;
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}
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reprobe->dev = get_device(trans->dev);
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INIT_WORK(&reprobe->work, iwl_trans_reprobe_wk);
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schedule_work(&reprobe->work);
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break;
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default:
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iwl_trans_pcie_reset(trans, mode);
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break;
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}
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}
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struct iwl_trans *iwl_trans_alloc(unsigned int priv_size,
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struct device *dev,
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const struct iwl_cfg_trans_params *cfg_trans)
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{
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struct iwl_trans *trans;
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#ifdef CONFIG_LOCKDEP
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static struct lock_class_key __sync_cmd_key;
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#endif
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trans = devm_kzalloc(dev, sizeof(*trans) + priv_size, GFP_KERNEL);
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if (!trans)
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return NULL;
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trans->trans_cfg = cfg_trans;
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#ifdef CONFIG_LOCKDEP
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lockdep_init_map(&trans->sync_cmd_lockdep_map, "sync_cmd_lockdep_map",
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&__sync_cmd_key, 0);
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#endif
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trans->dev = dev;
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trans->num_rx_queues = 1;
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INIT_WORK(&trans->restart.wk, iwl_trans_restart_wk);
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return trans;
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}
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int iwl_trans_init(struct iwl_trans *trans)
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{
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int txcmd_size, txcmd_align;
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if (!trans->trans_cfg->gen2) {
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txcmd_size = sizeof(struct iwl_tx_cmd);
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txcmd_align = sizeof(void *);
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} else if (trans->trans_cfg->device_family < IWL_DEVICE_FAMILY_AX210) {
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txcmd_size = sizeof(struct iwl_tx_cmd_gen2);
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txcmd_align = 64;
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} else {
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txcmd_size = sizeof(struct iwl_tx_cmd_gen3);
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txcmd_align = 128;
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}
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txcmd_size += sizeof(struct iwl_cmd_header);
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txcmd_size += 36; /* biggest possible 802.11 header */
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/* Ensure device TX cmd cannot reach/cross a page boundary in gen2 */
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if (WARN_ON(trans->trans_cfg->gen2 && txcmd_size >= txcmd_align))
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return -EINVAL;
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snprintf(trans->dev_cmd_pool_name, sizeof(trans->dev_cmd_pool_name),
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"iwl_cmd_pool:%s", dev_name(trans->dev));
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trans->dev_cmd_pool =
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kmem_cache_create(trans->dev_cmd_pool_name,
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txcmd_size, txcmd_align,
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SLAB_HWCACHE_ALIGN, NULL);
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if (!trans->dev_cmd_pool)
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return -ENOMEM;
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/* Initialize the wait queue for commands */
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init_waitqueue_head(&trans->wait_command_queue);
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return 0;
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}
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void iwl_trans_free(struct iwl_trans *trans)
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{
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cancel_work_sync(&trans->restart.wk);
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kmem_cache_destroy(trans->dev_cmd_pool);
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}
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int iwl_trans_send_cmd(struct iwl_trans *trans, struct iwl_host_cmd *cmd)
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{
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int ret;
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if (unlikely(!(cmd->flags & CMD_SEND_IN_RFKILL) &&
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test_bit(STATUS_RFKILL_OPMODE, &trans->status)))
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return -ERFKILL;
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/*
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* We can't test IWL_MVM_STATUS_IN_D3 in mvm->status because this
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* bit is set early in the D3 flow, before we send all the commands
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* that configure the firmware for D3 operation (power, patterns, ...)
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* and we don't want to flag all those with CMD_SEND_IN_D3.
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* So use the system_pm_mode instead. The only command sent after
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* we set system_pm_mode is D3_CONFIG_CMD, which we now flag with
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* CMD_SEND_IN_D3.
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*/
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if (unlikely(trans->system_pm_mode == IWL_PLAT_PM_MODE_D3 &&
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!(cmd->flags & CMD_SEND_IN_D3)))
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return -EHOSTDOWN;
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if (unlikely(test_bit(STATUS_FW_ERROR, &trans->status)))
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return -EIO;
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if (WARN_ONCE(trans->state != IWL_TRANS_FW_ALIVE,
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"bad state = %d\n", trans->state))
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return -EIO;
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if (!(cmd->flags & CMD_ASYNC))
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lock_map_acquire_read(&trans->sync_cmd_lockdep_map);
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if (trans->wide_cmd_header && !iwl_cmd_groupid(cmd->id)) {
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if (cmd->id != REPLY_ERROR)
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cmd->id = DEF_ID(cmd->id);
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}
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ret = iwl_trans_pcie_send_hcmd(trans, cmd);
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if (!(cmd->flags & CMD_ASYNC))
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lock_map_release(&trans->sync_cmd_lockdep_map);
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if (WARN_ON((cmd->flags & CMD_WANT_SKB) && !ret && !cmd->resp_pkt))
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return -EIO;
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return ret;
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}
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IWL_EXPORT_SYMBOL(iwl_trans_send_cmd);
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/* Comparator for struct iwl_hcmd_names.
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* Used in the binary search over a list of host commands.
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*
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* @key: command_id that we're looking for.
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* @elt: struct iwl_hcmd_names candidate for match.
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*
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* @return 0 iff equal.
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*/
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static int iwl_hcmd_names_cmp(const void *key, const void *elt)
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{
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const struct iwl_hcmd_names *name = elt;
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const u8 *cmd1 = key;
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u8 cmd2 = name->cmd_id;
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return (*cmd1 - cmd2);
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}
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const char *iwl_get_cmd_string(struct iwl_trans *trans, u32 id)
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{
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u8 grp, cmd;
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struct iwl_hcmd_names *ret;
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const struct iwl_hcmd_arr *arr;
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size_t size = sizeof(struct iwl_hcmd_names);
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grp = iwl_cmd_groupid(id);
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cmd = iwl_cmd_opcode(id);
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if (!trans->command_groups || grp >= trans->command_groups_size ||
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!trans->command_groups[grp].arr)
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return "UNKNOWN";
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arr = &trans->command_groups[grp];
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ret = bsearch(&cmd, arr->arr, arr->size, size, iwl_hcmd_names_cmp);
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if (!ret)
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return "UNKNOWN";
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return ret->cmd_name;
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}
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IWL_EXPORT_SYMBOL(iwl_get_cmd_string);
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int iwl_cmd_groups_verify_sorted(const struct iwl_trans_config *trans)
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{
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int i, j;
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const struct iwl_hcmd_arr *arr;
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for (i = 0; i < trans->command_groups_size; i++) {
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arr = &trans->command_groups[i];
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if (!arr->arr)
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continue;
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for (j = 0; j < arr->size - 1; j++)
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if (arr->arr[j].cmd_id > arr->arr[j + 1].cmd_id)
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return -1;
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}
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return 0;
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}
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IWL_EXPORT_SYMBOL(iwl_cmd_groups_verify_sorted);
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void iwl_trans_configure(struct iwl_trans *trans,
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const struct iwl_trans_config *trans_cfg)
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{
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trans->op_mode = trans_cfg->op_mode;
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iwl_trans_pcie_configure(trans, trans_cfg);
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WARN_ON(iwl_cmd_groups_verify_sorted(trans_cfg));
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}
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IWL_EXPORT_SYMBOL(iwl_trans_configure);
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int iwl_trans_start_hw(struct iwl_trans *trans)
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{
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might_sleep();
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return iwl_trans_pcie_start_hw(trans);
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}
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IWL_EXPORT_SYMBOL(iwl_trans_start_hw);
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void iwl_trans_op_mode_leave(struct iwl_trans *trans)
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{
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might_sleep();
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iwl_trans_pcie_op_mode_leave(trans);
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trans->op_mode = NULL;
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trans->state = IWL_TRANS_NO_FW;
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}
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IWL_EXPORT_SYMBOL(iwl_trans_op_mode_leave);
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void iwl_trans_write8(struct iwl_trans *trans, u32 ofs, u8 val)
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{
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iwl_trans_pcie_write8(trans, ofs, val);
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}
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IWL_EXPORT_SYMBOL(iwl_trans_write8);
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void iwl_trans_write32(struct iwl_trans *trans, u32 ofs, u32 val)
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{
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iwl_trans_pcie_write32(trans, ofs, val);
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}
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IWL_EXPORT_SYMBOL(iwl_trans_write32);
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u32 iwl_trans_read32(struct iwl_trans *trans, u32 ofs)
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{
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return iwl_trans_pcie_read32(trans, ofs);
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}
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IWL_EXPORT_SYMBOL(iwl_trans_read32);
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u32 iwl_trans_read_prph(struct iwl_trans *trans, u32 ofs)
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{
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return iwl_trans_pcie_read_prph(trans, ofs);
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}
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IWL_EXPORT_SYMBOL(iwl_trans_read_prph);
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void iwl_trans_write_prph(struct iwl_trans *trans, u32 ofs, u32 val)
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{
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return iwl_trans_pcie_write_prph(trans, ofs, val);
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}
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IWL_EXPORT_SYMBOL(iwl_trans_write_prph);
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int iwl_trans_read_mem(struct iwl_trans *trans, u32 addr,
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void *buf, int dwords)
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{
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return iwl_trans_pcie_read_mem(trans, addr, buf, dwords);
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}
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IWL_EXPORT_SYMBOL(iwl_trans_read_mem);
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int iwl_trans_write_mem(struct iwl_trans *trans, u32 addr,
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const void *buf, int dwords)
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{
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return iwl_trans_pcie_write_mem(trans, addr, buf, dwords);
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}
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IWL_EXPORT_SYMBOL(iwl_trans_write_mem);
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void iwl_trans_set_pmi(struct iwl_trans *trans, bool state)
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{
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if (state)
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set_bit(STATUS_TPOWER_PMI, &trans->status);
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else
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clear_bit(STATUS_TPOWER_PMI, &trans->status);
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}
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IWL_EXPORT_SYMBOL(iwl_trans_set_pmi);
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int iwl_trans_sw_reset(struct iwl_trans *trans, bool retake_ownership)
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{
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return iwl_trans_pcie_sw_reset(trans, retake_ownership);
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}
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IWL_EXPORT_SYMBOL(iwl_trans_sw_reset);
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struct iwl_trans_dump_data *
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iwl_trans_dump_data(struct iwl_trans *trans, u32 dump_mask,
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const struct iwl_dump_sanitize_ops *sanitize_ops,
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void *sanitize_ctx)
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{
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return iwl_trans_pcie_dump_data(trans, dump_mask,
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sanitize_ops, sanitize_ctx);
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}
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IWL_EXPORT_SYMBOL(iwl_trans_dump_data);
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int iwl_trans_d3_suspend(struct iwl_trans *trans, bool test, bool reset)
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{
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might_sleep();
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return iwl_trans_pcie_d3_suspend(trans, test, reset);
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}
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IWL_EXPORT_SYMBOL(iwl_trans_d3_suspend);
|
|
|
|
int iwl_trans_d3_resume(struct iwl_trans *trans, enum iwl_d3_status *status,
|
|
bool test, bool reset)
|
|
{
|
|
might_sleep();
|
|
|
|
return iwl_trans_pcie_d3_resume(trans, status, test, reset);
|
|
}
|
|
IWL_EXPORT_SYMBOL(iwl_trans_d3_resume);
|
|
|
|
void iwl_trans_interrupts(struct iwl_trans *trans, bool enable)
|
|
{
|
|
iwl_trans_pci_interrupts(trans, enable);
|
|
}
|
|
IWL_EXPORT_SYMBOL(iwl_trans_interrupts);
|
|
|
|
void iwl_trans_sync_nmi(struct iwl_trans *trans)
|
|
{
|
|
iwl_trans_pcie_sync_nmi(trans);
|
|
}
|
|
IWL_EXPORT_SYMBOL(iwl_trans_sync_nmi);
|
|
|
|
int iwl_trans_write_imr_mem(struct iwl_trans *trans, u32 dst_addr,
|
|
u64 src_addr, u32 byte_cnt)
|
|
{
|
|
return iwl_trans_pcie_copy_imr(trans, dst_addr, src_addr, byte_cnt);
|
|
}
|
|
IWL_EXPORT_SYMBOL(iwl_trans_write_imr_mem);
|
|
|
|
void iwl_trans_set_bits_mask(struct iwl_trans *trans, u32 reg,
|
|
u32 mask, u32 value)
|
|
{
|
|
iwl_trans_pcie_set_bits_mask(trans, reg, mask, value);
|
|
}
|
|
IWL_EXPORT_SYMBOL(iwl_trans_set_bits_mask);
|
|
|
|
int iwl_trans_read_config32(struct iwl_trans *trans, u32 ofs,
|
|
u32 *val)
|
|
{
|
|
return iwl_trans_pcie_read_config32(trans, ofs, val);
|
|
}
|
|
IWL_EXPORT_SYMBOL(iwl_trans_read_config32);
|
|
|
|
bool _iwl_trans_grab_nic_access(struct iwl_trans *trans)
|
|
{
|
|
return iwl_trans_pcie_grab_nic_access(trans);
|
|
}
|
|
IWL_EXPORT_SYMBOL(_iwl_trans_grab_nic_access);
|
|
|
|
void __releases(nic_access)
|
|
iwl_trans_release_nic_access(struct iwl_trans *trans)
|
|
{
|
|
iwl_trans_pcie_release_nic_access(trans);
|
|
__release(nic_access);
|
|
}
|
|
IWL_EXPORT_SYMBOL(iwl_trans_release_nic_access);
|
|
|
|
void iwl_trans_fw_alive(struct iwl_trans *trans, u32 scd_addr)
|
|
{
|
|
might_sleep();
|
|
|
|
trans->state = IWL_TRANS_FW_ALIVE;
|
|
|
|
if (trans->trans_cfg->gen2)
|
|
iwl_trans_pcie_gen2_fw_alive(trans);
|
|
else
|
|
iwl_trans_pcie_fw_alive(trans, scd_addr);
|
|
}
|
|
IWL_EXPORT_SYMBOL(iwl_trans_fw_alive);
|
|
|
|
int iwl_trans_start_fw(struct iwl_trans *trans, const struct fw_img *fw,
|
|
bool run_in_rfkill)
|
|
{
|
|
int ret;
|
|
|
|
might_sleep();
|
|
|
|
WARN_ON_ONCE(!trans->rx_mpdu_cmd);
|
|
|
|
clear_bit(STATUS_FW_ERROR, &trans->status);
|
|
|
|
if (trans->trans_cfg->gen2)
|
|
ret = iwl_trans_pcie_gen2_start_fw(trans, fw, run_in_rfkill);
|
|
else
|
|
ret = iwl_trans_pcie_start_fw(trans, fw, run_in_rfkill);
|
|
|
|
if (ret == 0)
|
|
trans->state = IWL_TRANS_FW_STARTED;
|
|
|
|
return ret;
|
|
}
|
|
IWL_EXPORT_SYMBOL(iwl_trans_start_fw);
|
|
|
|
void iwl_trans_stop_device(struct iwl_trans *trans)
|
|
{
|
|
might_sleep();
|
|
|
|
/*
|
|
* See also the comment in iwl_trans_restart_wk().
|
|
*
|
|
* When the opmode stops the device while a reset is pending, the
|
|
* worker (iwl_trans_restart_wk) might not have run yet or, more
|
|
* likely, will be blocked on the opmode lock. Due to the locking,
|
|
* we can't just flush the worker.
|
|
*
|
|
* If this is the case, then the test_and_clear_bit() ensures that
|
|
* the worker won't attempt to do anything after the stop.
|
|
*
|
|
* The trans->restart.mode is a handshake with the opmode, we set
|
|
* the context there to ABORT so that when the worker can finally
|
|
* acquire the lock in the opmode, the code there won't attempt to
|
|
* do any dumps. Since we'd really like to have the dump though,
|
|
* also do it inline here (with the opmode locks already held),
|
|
* but use a separate mode struct to avoid races.
|
|
*/
|
|
if (test_and_clear_bit(STATUS_RESET_PENDING, &trans->status)) {
|
|
struct iwl_fw_error_dump_mode mode;
|
|
|
|
mode = trans->restart.mode;
|
|
mode.context = IWL_ERR_CONTEXT_FROM_OPMODE;
|
|
trans->restart.mode.context = IWL_ERR_CONTEXT_ABORT;
|
|
|
|
iwl_op_mode_dump_error(trans->op_mode, &mode);
|
|
}
|
|
|
|
if (trans->trans_cfg->gen2)
|
|
iwl_trans_pcie_gen2_stop_device(trans);
|
|
else
|
|
iwl_trans_pcie_stop_device(trans);
|
|
|
|
trans->state = IWL_TRANS_NO_FW;
|
|
}
|
|
IWL_EXPORT_SYMBOL(iwl_trans_stop_device);
|
|
|
|
int iwl_trans_tx(struct iwl_trans *trans, struct sk_buff *skb,
|
|
struct iwl_device_tx_cmd *dev_cmd, int queue)
|
|
{
|
|
if (unlikely(test_bit(STATUS_FW_ERROR, &trans->status)))
|
|
return -EIO;
|
|
|
|
if (WARN_ONCE(trans->state != IWL_TRANS_FW_ALIVE,
|
|
"bad state = %d\n", trans->state))
|
|
return -EIO;
|
|
|
|
if (trans->trans_cfg->gen2)
|
|
return iwl_txq_gen2_tx(trans, skb, dev_cmd, queue);
|
|
|
|
return iwl_trans_pcie_tx(trans, skb, dev_cmd, queue);
|
|
}
|
|
IWL_EXPORT_SYMBOL(iwl_trans_tx);
|
|
|
|
void iwl_trans_reclaim(struct iwl_trans *trans, int queue, int ssn,
|
|
struct sk_buff_head *skbs, bool is_flush)
|
|
{
|
|
if (WARN_ONCE(trans->state != IWL_TRANS_FW_ALIVE,
|
|
"bad state = %d\n", trans->state))
|
|
return;
|
|
|
|
iwl_pcie_reclaim(trans, queue, ssn, skbs, is_flush);
|
|
}
|
|
IWL_EXPORT_SYMBOL(iwl_trans_reclaim);
|
|
|
|
void iwl_trans_txq_disable(struct iwl_trans *trans, int queue,
|
|
bool configure_scd)
|
|
{
|
|
iwl_trans_pcie_txq_disable(trans, queue, configure_scd);
|
|
}
|
|
IWL_EXPORT_SYMBOL(iwl_trans_txq_disable);
|
|
|
|
bool iwl_trans_txq_enable_cfg(struct iwl_trans *trans, int queue, u16 ssn,
|
|
const struct iwl_trans_txq_scd_cfg *cfg,
|
|
unsigned int queue_wdg_timeout)
|
|
{
|
|
might_sleep();
|
|
|
|
if (WARN_ONCE(trans->state != IWL_TRANS_FW_ALIVE,
|
|
"bad state = %d\n", trans->state))
|
|
return false;
|
|
|
|
return iwl_trans_pcie_txq_enable(trans, queue, ssn,
|
|
cfg, queue_wdg_timeout);
|
|
}
|
|
IWL_EXPORT_SYMBOL(iwl_trans_txq_enable_cfg);
|
|
|
|
int iwl_trans_wait_txq_empty(struct iwl_trans *trans, int queue)
|
|
{
|
|
if (WARN_ONCE(trans->state != IWL_TRANS_FW_ALIVE,
|
|
"bad state = %d\n", trans->state))
|
|
return -EIO;
|
|
|
|
return iwl_trans_pcie_wait_txq_empty(trans, queue);
|
|
}
|
|
IWL_EXPORT_SYMBOL(iwl_trans_wait_txq_empty);
|
|
|
|
int iwl_trans_wait_tx_queues_empty(struct iwl_trans *trans, u32 txqs)
|
|
{
|
|
if (WARN_ONCE(trans->state != IWL_TRANS_FW_ALIVE,
|
|
"bad state = %d\n", trans->state))
|
|
return -EIO;
|
|
|
|
return iwl_trans_pcie_wait_txqs_empty(trans, txqs);
|
|
}
|
|
IWL_EXPORT_SYMBOL(iwl_trans_wait_tx_queues_empty);
|
|
|
|
void iwl_trans_freeze_txq_timer(struct iwl_trans *trans,
|
|
unsigned long txqs, bool freeze)
|
|
{
|
|
if (WARN_ONCE(trans->state != IWL_TRANS_FW_ALIVE,
|
|
"bad state = %d\n", trans->state))
|
|
return;
|
|
|
|
iwl_pcie_freeze_txq_timer(trans, txqs, freeze);
|
|
}
|
|
IWL_EXPORT_SYMBOL(iwl_trans_freeze_txq_timer);
|
|
|
|
void iwl_trans_txq_set_shared_mode(struct iwl_trans *trans,
|
|
int txq_id, bool shared_mode)
|
|
{
|
|
iwl_trans_pcie_txq_set_shared_mode(trans, txq_id, shared_mode);
|
|
}
|
|
IWL_EXPORT_SYMBOL(iwl_trans_txq_set_shared_mode);
|
|
|
|
#ifdef CONFIG_IWLWIFI_DEBUGFS
|
|
void iwl_trans_debugfs_cleanup(struct iwl_trans *trans)
|
|
{
|
|
iwl_trans_pcie_debugfs_cleanup(trans);
|
|
}
|
|
IWL_EXPORT_SYMBOL(iwl_trans_debugfs_cleanup);
|
|
#endif
|
|
|
|
void iwl_trans_set_q_ptrs(struct iwl_trans *trans, int queue, int ptr)
|
|
{
|
|
if (WARN_ONCE(trans->state != IWL_TRANS_FW_ALIVE,
|
|
"bad state = %d\n", trans->state))
|
|
return;
|
|
|
|
iwl_pcie_set_q_ptrs(trans, queue, ptr);
|
|
}
|
|
IWL_EXPORT_SYMBOL(iwl_trans_set_q_ptrs);
|
|
|
|
int iwl_trans_txq_alloc(struct iwl_trans *trans, u32 flags, u32 sta_mask,
|
|
u8 tid, int size, unsigned int wdg_timeout)
|
|
{
|
|
might_sleep();
|
|
|
|
if (WARN_ONCE(trans->state != IWL_TRANS_FW_ALIVE,
|
|
"bad state = %d\n", trans->state))
|
|
return -EIO;
|
|
|
|
return iwl_txq_dyn_alloc(trans, flags, sta_mask, tid,
|
|
size, wdg_timeout);
|
|
}
|
|
IWL_EXPORT_SYMBOL(iwl_trans_txq_alloc);
|
|
|
|
void iwl_trans_txq_free(struct iwl_trans *trans, int queue)
|
|
{
|
|
iwl_txq_dyn_free(trans, queue);
|
|
}
|
|
IWL_EXPORT_SYMBOL(iwl_trans_txq_free);
|
|
|
|
int iwl_trans_get_rxq_dma_data(struct iwl_trans *trans, int queue,
|
|
struct iwl_trans_rxq_dma_data *data)
|
|
{
|
|
return iwl_trans_pcie_rxq_dma_data(trans, queue, data);
|
|
}
|
|
IWL_EXPORT_SYMBOL(iwl_trans_get_rxq_dma_data);
|
|
|
|
int iwl_trans_load_pnvm(struct iwl_trans *trans,
|
|
const struct iwl_pnvm_image *pnvm_data,
|
|
const struct iwl_ucode_capabilities *capa)
|
|
{
|
|
return iwl_trans_pcie_ctx_info_gen3_load_pnvm(trans, pnvm_data, capa);
|
|
}
|
|
IWL_EXPORT_SYMBOL(iwl_trans_load_pnvm);
|
|
|
|
void iwl_trans_set_pnvm(struct iwl_trans *trans,
|
|
const struct iwl_ucode_capabilities *capa)
|
|
{
|
|
iwl_trans_pcie_ctx_info_gen3_set_pnvm(trans, capa);
|
|
}
|
|
IWL_EXPORT_SYMBOL(iwl_trans_set_pnvm);
|
|
|
|
int iwl_trans_load_reduce_power(struct iwl_trans *trans,
|
|
const struct iwl_pnvm_image *payloads,
|
|
const struct iwl_ucode_capabilities *capa)
|
|
{
|
|
return iwl_trans_pcie_ctx_info_gen3_load_reduce_power(trans, payloads,
|
|
capa);
|
|
}
|
|
IWL_EXPORT_SYMBOL(iwl_trans_load_reduce_power);
|
|
|
|
void iwl_trans_set_reduce_power(struct iwl_trans *trans,
|
|
const struct iwl_ucode_capabilities *capa)
|
|
{
|
|
iwl_trans_pcie_ctx_info_gen3_set_reduce_power(trans, capa);
|
|
}
|
|
IWL_EXPORT_SYMBOL(iwl_trans_set_reduce_power);
|