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Code
ae65a26dd3
linux/drivers/gpu/drm/amd/include/asic_reg/dce
History
Harry Wentland 33503e9e5a drm/amd/amdgpu: Add DPHY_SCRAM_CNTL register defines 
This is required for DP HBR2 test pattern

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-01-27 11:12:44 -05:00
..
dce_6_0_d.h drm/amd/amdgpu: port of DCE v6 to new headers (v3) 2016-11-23 15:08:42 -05:00
dce_6_0_sh_mask.h drm/amd/amdgpu: Introduction of SI registers (v2) 2016-11-11 10:21:07 -05:00
dce_8_0_d.h drm/amd/amdgpu: Add DPHY_SCRAM_CNTL register defines 2017-01-27 11:12:44 -05:00
dce_8_0_enum.h drm/amd: add dce8 enum register header 2016-02-10 14:17:02 -05:00
dce_8_0_sh_mask.h drm/amd/amdgpu: Add DPHY_SCRAM_CNTL register defines 2017-01-27 11:12:44 -05:00
dce_10_0_d.h drm/amd/amdgpu: Add DPHY_SCRAM_CNTL register defines 2017-01-27 11:12:44 -05:00
dce_10_0_enum.h
dce_10_0_sh_mask.h drm/amd/amdgpu: Add DPHY_SCRAM_CNTL register defines 2017-01-27 11:12:44 -05:00
dce_11_0_d.h drm/amd/amdgpu: Add DPHY_SCRAM_CNTL register defines 2017-01-27 11:12:44 -05:00
dce_11_0_enum.h drm/amdgpu: add DCE 11.0 register headers 2015-06-03 21:02:54 -04:00
dce_11_0_sh_mask.h drm/amd/amdgpu: Add DPHY_SCRAM_CNTL register defines 2017-01-27 11:12:44 -05:00
dce_11_2_d.h drm/amd/amdgpu: Add DPHY_SCRAM_CNTL register defines 2017-01-27 11:12:44 -05:00
dce_11_2_enum.h drm/amd: add DCE 11.2 register headers 2016-05-04 20:23:19 -04:00
dce_11_2_sh_mask.h drm/amd/amdgpu: Add DPHY_SCRAM_CNTL register defines 2017-01-27 11:12:44 -05:00