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This is a preparation before adding the Max-Link-width capability setup which would in its turn complete the max-link-width setup procedure defined by Synopsys in the HW-manual. Seeing there is a max-link-speed setup method defined in the DW PCIe core driver it would be good to have a similar function for the link width setup. That's why we need to define a dedicated function first from already implemented but incomplete link-width setting up code. Link: https://lore.kernel.org/linux-pci/20231018085631.1121289-3-yoshihiro.shimoda.uh@renesas.com Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org> Reviewed-by: Manivannan Sadhasivam <mani@kernel.org> Reviewed-by: Serge Semin <fancer.lancer@gmail.com> |
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| .. | ||
| Kconfig | ||
| Makefile | ||
| pci-dra7xx.c | ||
| pci-exynos.c | ||
| pci-imx6.c | ||
| pci-keystone.c | ||
| pci-layerscape-ep.c | ||
| pci-layerscape.c | ||
| pci-meson.c | ||
| pcie-al.c | ||
| pcie-armada8k.c | ||
| pcie-artpec6.c | ||
| pcie-bt1.c | ||
| pcie-designware-ep.c | ||
| pcie-designware-host.c | ||
| pcie-designware-plat.c | ||
| pcie-designware.c | ||
| pcie-designware.h | ||
| pcie-dw-rockchip.c | ||
| pcie-fu740.c | ||
| pcie-hisi.c | ||
| pcie-histb.c | ||
| pcie-intel-gw.c | ||
| pcie-keembay.c | ||
| pcie-kirin.c | ||
| pcie-qcom-ep.c | ||
| pcie-qcom.c | ||
| pcie-spear13xx.c | ||
| pcie-tegra194-acpi.c | ||
| pcie-tegra194.c | ||
| pcie-uniphier-ep.c | ||
| pcie-uniphier.c | ||
| pcie-visconti.c | ||