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	 b759415020
			
		
	
	
		b759415020
		
	
	
	
	
		
			
			Implement Read back of HDR metadata infoframes i.e Dynamic Range and Mastering Infoframe for LSPCON devices. v2: Added proper bitmask of enabled infoframes as per Ville's recommendation. v3: Dropped a redundant wrapper as per Ville's comment. v4: Dropped a redundant print, added Ville's RB. Signed-off-by: Uma Shankar <uma.shankar@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20201130204738.2443-14-uma.shankar@intel.com
		
			
				
	
	
		
			702 lines
		
	
	
		
			18 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			702 lines
		
	
	
		
			18 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * Copyright © 2016 Intel Corporation
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|  *
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|  * Permission is hereby granted, free of charge, to any person obtaining a
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|  * copy of this software and associated documentation files (the "Software"),
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|  * to deal in the Software without restriction, including without limitation
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|  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
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|  * and/or sell copies of the Software, and to permit persons to whom the
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|  * Software is furnished to do so, subject to the following conditions:
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|  *
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|  * The above copyright notice and this permission notice (including the next
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|  * paragraph) shall be included in all copies or substantial portions of the
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|  * Software.
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|  *
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|  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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|  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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|  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
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|  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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|  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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|  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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|  * DEALINGS IN THE SOFTWARE.
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|  *
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|  *
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|  */
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| 
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| #include <drm/drm_atomic_helper.h>
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| #include <drm/drm_dp_dual_mode_helper.h>
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| #include <drm/drm_edid.h>
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| 
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| #include "intel_display_types.h"
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| #include "intel_dp.h"
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| #include "intel_lspcon.h"
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| #include "intel_hdmi.h"
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| 
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| /* LSPCON OUI Vendor ID(signatures) */
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| #define LSPCON_VENDOR_PARADE_OUI 0x001CF8
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| #define LSPCON_VENDOR_MCA_OUI 0x0060AD
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| 
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| #define DPCD_MCA_LSPCON_HDR_STATUS	0x70003
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| #define DPCD_PARADE_LSPCON_HDR_STATUS	0x00511
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| 
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| /* AUX addresses to write MCA AVI IF */
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| #define LSPCON_MCA_AVI_IF_WRITE_OFFSET 0x5C0
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| #define LSPCON_MCA_AVI_IF_CTRL 0x5DF
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| #define  LSPCON_MCA_AVI_IF_KICKOFF (1 << 0)
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| #define  LSPCON_MCA_AVI_IF_HANDLED (1 << 1)
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| 
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| /* AUX addresses to write Parade AVI IF */
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| #define LSPCON_PARADE_AVI_IF_WRITE_OFFSET 0x516
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| #define LSPCON_PARADE_AVI_IF_CTRL 0x51E
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| #define  LSPCON_PARADE_AVI_IF_KICKOFF (1 << 7)
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| #define LSPCON_PARADE_AVI_IF_DATA_SIZE 32
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| 
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| static struct intel_dp *lspcon_to_intel_dp(struct intel_lspcon *lspcon)
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| {
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| 	struct intel_digital_port *dig_port =
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| 		container_of(lspcon, struct intel_digital_port, lspcon);
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| 
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| 	return &dig_port->dp;
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| }
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| 
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| static const char *lspcon_mode_name(enum drm_lspcon_mode mode)
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| {
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| 	switch (mode) {
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| 	case DRM_LSPCON_MODE_PCON:
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| 		return "PCON";
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| 	case DRM_LSPCON_MODE_LS:
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| 		return "LS";
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| 	case DRM_LSPCON_MODE_INVALID:
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| 		return "INVALID";
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| 	default:
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| 		MISSING_CASE(mode);
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| 		return "INVALID";
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| 	}
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| }
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| 
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| static bool lspcon_detect_vendor(struct intel_lspcon *lspcon)
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| {
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| 	struct intel_dp *dp = lspcon_to_intel_dp(lspcon);
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| 	struct drm_dp_dpcd_ident *ident;
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| 	u32 vendor_oui;
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| 
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| 	if (drm_dp_read_desc(&dp->aux, &dp->desc, drm_dp_is_branch(dp->dpcd))) {
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| 		DRM_ERROR("Can't read description\n");
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| 		return false;
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| 	}
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| 
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| 	ident = &dp->desc.ident;
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| 	vendor_oui = (ident->oui[0] << 16) | (ident->oui[1] << 8) |
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| 		      ident->oui[2];
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| 
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| 	switch (vendor_oui) {
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| 	case LSPCON_VENDOR_MCA_OUI:
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| 		lspcon->vendor = LSPCON_VENDOR_MCA;
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| 		DRM_DEBUG_KMS("Vendor: Mega Chips\n");
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| 		break;
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| 
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| 	case LSPCON_VENDOR_PARADE_OUI:
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| 		lspcon->vendor = LSPCON_VENDOR_PARADE;
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| 		DRM_DEBUG_KMS("Vendor: Parade Tech\n");
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| 		break;
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| 
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| 	default:
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| 		DRM_ERROR("Invalid/Unknown vendor OUI\n");
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| 		return false;
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| 	}
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| 
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| 	return true;
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| }
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| 
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| static u32 get_hdr_status_reg(struct intel_lspcon *lspcon)
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| {
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| 	if (lspcon->vendor == LSPCON_VENDOR_MCA)
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| 		return DPCD_MCA_LSPCON_HDR_STATUS;
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| 	else
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| 		return DPCD_PARADE_LSPCON_HDR_STATUS;
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| }
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| 
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| void lspcon_detect_hdr_capability(struct intel_lspcon *lspcon)
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| {
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| 	struct intel_digital_port *dig_port =
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| 		container_of(lspcon, struct intel_digital_port, lspcon);
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| 	struct drm_device *dev = dig_port->base.base.dev;
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| 	struct intel_dp *dp = lspcon_to_intel_dp(lspcon);
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| 	u8 hdr_caps;
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| 	int ret;
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| 
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| 	ret = drm_dp_dpcd_read(&dp->aux, get_hdr_status_reg(lspcon),
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| 			       &hdr_caps, 1);
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| 
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| 	if (ret < 0) {
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| 		drm_dbg_kms(dev, "HDR capability detection failed\n");
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| 		lspcon->hdr_supported = false;
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| 	} else if (hdr_caps & 0x1) {
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| 		drm_dbg_kms(dev, "LSPCON capable of HDR\n");
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| 		lspcon->hdr_supported = true;
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| 	}
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| }
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| 
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| static enum drm_lspcon_mode lspcon_get_current_mode(struct intel_lspcon *lspcon)
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| {
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| 	enum drm_lspcon_mode current_mode;
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| 	struct i2c_adapter *adapter = &lspcon_to_intel_dp(lspcon)->aux.ddc;
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| 
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| 	if (drm_lspcon_get_mode(adapter, ¤t_mode)) {
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| 		DRM_DEBUG_KMS("Error reading LSPCON mode\n");
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| 		return DRM_LSPCON_MODE_INVALID;
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| 	}
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| 	return current_mode;
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| }
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| 
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| static enum drm_lspcon_mode lspcon_wait_mode(struct intel_lspcon *lspcon,
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| 					     enum drm_lspcon_mode mode)
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| {
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| 	enum drm_lspcon_mode current_mode;
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| 
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| 	current_mode = lspcon_get_current_mode(lspcon);
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| 	if (current_mode == mode)
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| 		goto out;
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| 
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| 	DRM_DEBUG_KMS("Waiting for LSPCON mode %s to settle\n",
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| 		      lspcon_mode_name(mode));
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| 
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| 	wait_for((current_mode = lspcon_get_current_mode(lspcon)) == mode, 400);
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| 	if (current_mode != mode)
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| 		DRM_ERROR("LSPCON mode hasn't settled\n");
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| 
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| out:
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| 	DRM_DEBUG_KMS("Current LSPCON mode %s\n",
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| 		      lspcon_mode_name(current_mode));
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| 
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| 	return current_mode;
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| }
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| 
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| static int lspcon_change_mode(struct intel_lspcon *lspcon,
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| 			      enum drm_lspcon_mode mode)
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| {
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| 	int err;
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| 	enum drm_lspcon_mode current_mode;
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| 	struct i2c_adapter *adapter = &lspcon_to_intel_dp(lspcon)->aux.ddc;
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| 
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| 	err = drm_lspcon_get_mode(adapter, ¤t_mode);
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| 	if (err) {
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| 		DRM_ERROR("Error reading LSPCON mode\n");
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| 		return err;
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| 	}
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| 
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| 	if (current_mode == mode) {
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| 		DRM_DEBUG_KMS("Current mode = desired LSPCON mode\n");
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| 		return 0;
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| 	}
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| 
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| 	err = drm_lspcon_set_mode(adapter, mode);
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| 	if (err < 0) {
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| 		DRM_ERROR("LSPCON mode change failed\n");
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| 		return err;
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| 	}
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| 
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| 	lspcon->mode = mode;
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| 	DRM_DEBUG_KMS("LSPCON mode changed done\n");
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| 	return 0;
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| }
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| 
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| static bool lspcon_wake_native_aux_ch(struct intel_lspcon *lspcon)
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| {
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| 	u8 rev;
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| 
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| 	if (drm_dp_dpcd_readb(&lspcon_to_intel_dp(lspcon)->aux, DP_DPCD_REV,
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| 			      &rev) != 1) {
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| 		DRM_DEBUG_KMS("Native AUX CH down\n");
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| 		return false;
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| 	}
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| 
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| 	DRM_DEBUG_KMS("Native AUX CH up, DPCD version: %d.%d\n",
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| 		      rev >> 4, rev & 0xf);
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| 
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| 	return true;
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| }
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| 
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| static bool lspcon_probe(struct intel_lspcon *lspcon)
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| {
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| 	int retry;
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| 	enum drm_dp_dual_mode_type adaptor_type;
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| 	struct i2c_adapter *adapter = &lspcon_to_intel_dp(lspcon)->aux.ddc;
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| 	enum drm_lspcon_mode expected_mode;
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| 
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| 	expected_mode = lspcon_wake_native_aux_ch(lspcon) ?
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| 			DRM_LSPCON_MODE_PCON : DRM_LSPCON_MODE_LS;
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| 
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| 	/* Lets probe the adaptor and check its type */
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| 	for (retry = 0; retry < 6; retry++) {
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| 		if (retry)
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| 			usleep_range(500, 1000);
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| 
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| 		adaptor_type = drm_dp_dual_mode_detect(adapter);
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| 		if (adaptor_type == DRM_DP_DUAL_MODE_LSPCON)
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| 			break;
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| 	}
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| 
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| 	if (adaptor_type != DRM_DP_DUAL_MODE_LSPCON) {
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| 		DRM_DEBUG_KMS("No LSPCON detected, found %s\n",
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| 			       drm_dp_get_dual_mode_type_name(adaptor_type));
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| 		return false;
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| 	}
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| 
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| 	/* Yay ... got a LSPCON device */
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| 	DRM_DEBUG_KMS("LSPCON detected\n");
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| 	lspcon->mode = lspcon_wait_mode(lspcon, expected_mode);
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| 
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| 	/*
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| 	 * In the SW state machine, lets Put LSPCON in PCON mode only.
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| 	 * In this way, it will work with both HDMI 1.4 sinks as well as HDMI
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| 	 * 2.0 sinks.
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| 	 */
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| 	if (lspcon->mode != DRM_LSPCON_MODE_PCON) {
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| 		if (lspcon_change_mode(lspcon, DRM_LSPCON_MODE_PCON) < 0) {
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| 			DRM_ERROR("LSPCON mode change to PCON failed\n");
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| 			return false;
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| 		}
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| 	}
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| 	return true;
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| }
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| 
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| static void lspcon_resume_in_pcon_wa(struct intel_lspcon *lspcon)
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| {
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| 	struct intel_dp *intel_dp = lspcon_to_intel_dp(lspcon);
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| 	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
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| 	unsigned long start = jiffies;
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| 
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| 	while (1) {
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| 		if (intel_digital_port_connected(&dig_port->base)) {
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| 			DRM_DEBUG_KMS("LSPCON recovering in PCON mode after %u ms\n",
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| 				      jiffies_to_msecs(jiffies - start));
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| 			return;
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| 		}
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| 
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| 		if (time_after(jiffies, start + msecs_to_jiffies(1000)))
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| 			break;
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| 
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| 		usleep_range(10000, 15000);
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| 	}
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| 
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| 	DRM_DEBUG_KMS("LSPCON DP descriptor mismatch after resume\n");
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| }
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| 
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| static bool lspcon_parade_fw_ready(struct drm_dp_aux *aux)
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| {
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| 	u8 avi_if_ctrl;
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| 	u8 retry;
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| 	ssize_t ret;
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| 
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| 	/* Check if LSPCON FW is ready for data */
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| 	for (retry = 0; retry < 5; retry++) {
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| 		if (retry)
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| 			usleep_range(200, 300);
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| 
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| 		ret = drm_dp_dpcd_read(aux, LSPCON_PARADE_AVI_IF_CTRL,
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| 				       &avi_if_ctrl, 1);
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| 		if (ret < 0) {
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| 			DRM_ERROR("Failed to read AVI IF control\n");
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| 			return false;
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| 		}
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| 
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| 		if ((avi_if_ctrl & LSPCON_PARADE_AVI_IF_KICKOFF) == 0)
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| 			return true;
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| 	}
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| 
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| 	DRM_ERROR("Parade FW not ready to accept AVI IF\n");
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| 	return false;
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| }
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| 
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| static bool _lspcon_parade_write_infoframe_blocks(struct drm_dp_aux *aux,
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| 						  u8 *avi_buf)
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| {
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| 	u8 avi_if_ctrl;
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| 	u8 block_count = 0;
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| 	u8 *data;
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| 	u16 reg;
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| 	ssize_t ret;
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| 
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| 	while (block_count < 4) {
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| 		if (!lspcon_parade_fw_ready(aux)) {
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| 			DRM_DEBUG_KMS("LSPCON FW not ready, block %d\n",
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| 				      block_count);
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| 			return false;
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| 		}
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| 
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| 		reg = LSPCON_PARADE_AVI_IF_WRITE_OFFSET;
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| 		data = avi_buf + block_count * 8;
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| 		ret = drm_dp_dpcd_write(aux, reg, data, 8);
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| 		if (ret < 0) {
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| 			DRM_ERROR("Failed to write AVI IF block %d\n",
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| 				  block_count);
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| 			return false;
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| 		}
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| 
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| 		/*
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| 		 * Once a block of data is written, we have to inform the FW
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| 		 * about this by writing into avi infoframe control register:
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| 		 * - set the kickoff bit[7] to 1
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| 		 * - write the block no. to bits[1:0]
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| 		 */
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| 		reg = LSPCON_PARADE_AVI_IF_CTRL;
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| 		avi_if_ctrl = LSPCON_PARADE_AVI_IF_KICKOFF | block_count;
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| 		ret = drm_dp_dpcd_write(aux, reg, &avi_if_ctrl, 1);
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| 		if (ret < 0) {
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| 			DRM_ERROR("Failed to update (0x%x), block %d\n",
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| 				  reg, block_count);
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| 			return false;
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| 		}
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| 
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| 		block_count++;
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| 	}
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| 
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| 	DRM_DEBUG_KMS("Wrote AVI IF blocks successfully\n");
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| 	return true;
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| }
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| 
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| static bool _lspcon_write_avi_infoframe_parade(struct drm_dp_aux *aux,
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| 					       const u8 *frame,
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| 					       ssize_t len)
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| {
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| 	u8 avi_if[LSPCON_PARADE_AVI_IF_DATA_SIZE] = {1, };
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| 
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| 	/*
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| 	 * Parade's frames contains 32 bytes of data, divided
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| 	 * into 4 frames:
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| 	 *	Token byte (first byte of first frame, must be non-zero)
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| 	 *	HB0 to HB2	 from AVI IF (3 bytes header)
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| 	 *	PB0 to PB27 from AVI IF (28 bytes data)
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| 	 * So it should look like this
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| 	 *	first block: | <token> <HB0-HB2> <DB0-DB3> |
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| 	 *	next 3 blocks: |<DB4-DB11>|<DB12-DB19>|<DB20-DB28>|
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| 	 */
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| 
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| 	if (len > LSPCON_PARADE_AVI_IF_DATA_SIZE - 1) {
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| 		DRM_ERROR("Invalid length of infoframes\n");
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| 		return false;
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| 	}
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| 
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| 	memcpy(&avi_if[1], frame, len);
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| 
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| 	if (!_lspcon_parade_write_infoframe_blocks(aux, avi_if)) {
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| 		DRM_DEBUG_KMS("Failed to write infoframe blocks\n");
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| 		return false;
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| 	}
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| 
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| 	return true;
 | |
| }
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| 
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| static bool _lspcon_write_avi_infoframe_mca(struct drm_dp_aux *aux,
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| 					    const u8 *buffer, ssize_t len)
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| {
 | |
| 	int ret;
 | |
| 	u32 val = 0;
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| 	u32 retry;
 | |
| 	u16 reg;
 | |
| 	const u8 *data = buffer;
 | |
| 
 | |
| 	reg = LSPCON_MCA_AVI_IF_WRITE_OFFSET;
 | |
| 	while (val < len) {
 | |
| 		/* DPCD write for AVI IF can fail on a slow FW day, so retry */
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| 		for (retry = 0; retry < 5; retry++) {
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| 			ret = drm_dp_dpcd_write(aux, reg, (void *)data, 1);
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| 			if (ret == 1) {
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| 				break;
 | |
| 			} else if (retry < 4) {
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| 				mdelay(50);
 | |
| 				continue;
 | |
| 			} else {
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| 				DRM_ERROR("DPCD write failed at:0x%x\n", reg);
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| 				return false;
 | |
| 			}
 | |
| 		}
 | |
| 		val++; reg++; data++;
 | |
| 	}
 | |
| 
 | |
| 	val = 0;
 | |
| 	reg = LSPCON_MCA_AVI_IF_CTRL;
 | |
| 	ret = drm_dp_dpcd_read(aux, reg, &val, 1);
 | |
| 	if (ret < 0) {
 | |
| 		DRM_ERROR("DPCD read failed, address 0x%x\n", reg);
 | |
| 		return false;
 | |
| 	}
 | |
| 
 | |
| 	/* Indicate LSPCON chip about infoframe, clear bit 1 and set bit 0 */
 | |
| 	val &= ~LSPCON_MCA_AVI_IF_HANDLED;
 | |
| 	val |= LSPCON_MCA_AVI_IF_KICKOFF;
 | |
| 
 | |
| 	ret = drm_dp_dpcd_write(aux, reg, &val, 1);
 | |
| 	if (ret < 0) {
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| 		DRM_ERROR("DPCD read failed, address 0x%x\n", reg);
 | |
| 		return false;
 | |
| 	}
 | |
| 
 | |
| 	val = 0;
 | |
| 	ret = drm_dp_dpcd_read(aux, reg, &val, 1);
 | |
| 	if (ret < 0) {
 | |
| 		DRM_ERROR("DPCD read failed, address 0x%x\n", reg);
 | |
| 		return false;
 | |
| 	}
 | |
| 
 | |
| 	if (val == LSPCON_MCA_AVI_IF_HANDLED)
 | |
| 		DRM_DEBUG_KMS("AVI IF handled by FW\n");
 | |
| 
 | |
| 	return true;
 | |
| }
 | |
| 
 | |
| void lspcon_write_infoframe(struct intel_encoder *encoder,
 | |
| 			    const struct intel_crtc_state *crtc_state,
 | |
| 			    unsigned int type,
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| 			    const void *frame, ssize_t len)
 | |
| {
 | |
| 	bool ret = true;
 | |
| 	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
 | |
| 	struct intel_lspcon *lspcon = enc_to_intel_lspcon(encoder);
 | |
| 
 | |
| 	switch (type) {
 | |
| 	case HDMI_INFOFRAME_TYPE_AVI:
 | |
| 		if (lspcon->vendor == LSPCON_VENDOR_MCA)
 | |
| 			ret = _lspcon_write_avi_infoframe_mca(&intel_dp->aux,
 | |
| 							      frame, len);
 | |
| 		else
 | |
| 			ret = _lspcon_write_avi_infoframe_parade(&intel_dp->aux,
 | |
| 								 frame, len);
 | |
| 		break;
 | |
| 	case HDMI_PACKET_TYPE_GAMUT_METADATA:
 | |
| 		drm_dbg_kms(encoder->base.dev, "Update HDR metadata for lspcon\n");
 | |
| 		/* It uses the legacy hsw implementation for the same */
 | |
| 		hsw_write_infoframe(encoder, crtc_state, type, frame, len);
 | |
| 		break;
 | |
| 	default:
 | |
| 		return;
 | |
| 	}
 | |
| 
 | |
| 	if (!ret) {
 | |
| 		DRM_ERROR("Failed to write infoframes\n");
 | |
| 		return;
 | |
| 	}
 | |
| }
 | |
| 
 | |
| void lspcon_read_infoframe(struct intel_encoder *encoder,
 | |
| 			   const struct intel_crtc_state *crtc_state,
 | |
| 			   unsigned int type,
 | |
| 			   void *frame, ssize_t len)
 | |
| {
 | |
| 	/* FIXME implement for AVI Infoframe as well */
 | |
| 	if (type == HDMI_PACKET_TYPE_GAMUT_METADATA)
 | |
| 		hsw_read_infoframe(encoder, crtc_state, type,
 | |
| 				   frame, len);
 | |
| }
 | |
| 
 | |
| void lspcon_set_infoframes(struct intel_encoder *encoder,
 | |
| 			   bool enable,
 | |
| 			   const struct intel_crtc_state *crtc_state,
 | |
| 			   const struct drm_connector_state *conn_state)
 | |
| {
 | |
| 	ssize_t ret;
 | |
| 	union hdmi_infoframe frame;
 | |
| 	u8 buf[VIDEO_DIP_DATA_SIZE];
 | |
| 	struct intel_digital_port *dig_port = enc_to_dig_port(encoder);
 | |
| 	struct intel_lspcon *lspcon = &dig_port->lspcon;
 | |
| 	const struct drm_display_mode *adjusted_mode =
 | |
| 		&crtc_state->hw.adjusted_mode;
 | |
| 
 | |
| 	if (!lspcon->active) {
 | |
| 		DRM_ERROR("Writing infoframes while LSPCON disabled ?\n");
 | |
| 		return;
 | |
| 	}
 | |
| 
 | |
| 	/* FIXME precompute infoframes */
 | |
| 
 | |
| 	ret = drm_hdmi_avi_infoframe_from_display_mode(&frame.avi,
 | |
| 						       conn_state->connector,
 | |
| 						       adjusted_mode);
 | |
| 	if (ret < 0) {
 | |
| 		DRM_ERROR("couldn't fill AVI infoframe\n");
 | |
| 		return;
 | |
| 	}
 | |
| 
 | |
| 	/*
 | |
| 	 * Currently there is no interface defined to
 | |
| 	 * check user preference between RGB/YCBCR444
 | |
| 	 * or YCBCR420. So the only possible case for
 | |
| 	 * YCBCR444 usage is driving YCBCR420 output
 | |
| 	 * with LSPCON, when pipe is configured for
 | |
| 	 * YCBCR444 output and LSPCON takes care of
 | |
| 	 * downsampling it.
 | |
| 	 */
 | |
| 	if (crtc_state->output_format == INTEL_OUTPUT_FORMAT_YCBCR444)
 | |
| 		frame.avi.colorspace = HDMI_COLORSPACE_YUV420;
 | |
| 	else
 | |
| 		frame.avi.colorspace = HDMI_COLORSPACE_RGB;
 | |
| 
 | |
| 	/* Set the Colorspace as per the HDMI spec */
 | |
| 	drm_hdmi_avi_infoframe_colorspace(&frame.avi, conn_state);
 | |
| 
 | |
| 	/* nonsense combination */
 | |
| 	drm_WARN_ON(encoder->base.dev, crtc_state->limited_color_range &&
 | |
| 		    crtc_state->output_format != INTEL_OUTPUT_FORMAT_RGB);
 | |
| 
 | |
| 	if (crtc_state->output_format == INTEL_OUTPUT_FORMAT_RGB) {
 | |
| 		drm_hdmi_avi_infoframe_quant_range(&frame.avi,
 | |
| 						   conn_state->connector,
 | |
| 						   adjusted_mode,
 | |
| 						   crtc_state->limited_color_range ?
 | |
| 						   HDMI_QUANTIZATION_RANGE_LIMITED :
 | |
| 						   HDMI_QUANTIZATION_RANGE_FULL);
 | |
| 	} else {
 | |
| 		frame.avi.quantization_range = HDMI_QUANTIZATION_RANGE_DEFAULT;
 | |
| 		frame.avi.ycc_quantization_range = HDMI_YCC_QUANTIZATION_RANGE_LIMITED;
 | |
| 	}
 | |
| 
 | |
| 	drm_hdmi_avi_infoframe_content_type(&frame.avi, conn_state);
 | |
| 
 | |
| 	ret = hdmi_infoframe_pack(&frame, buf, sizeof(buf));
 | |
| 	if (ret < 0) {
 | |
| 		DRM_ERROR("Failed to pack AVI IF\n");
 | |
| 		return;
 | |
| 	}
 | |
| 
 | |
| 	dig_port->write_infoframe(encoder, crtc_state, HDMI_INFOFRAME_TYPE_AVI,
 | |
| 				  buf, ret);
 | |
| }
 | |
| 
 | |
| static bool _lspcon_read_avi_infoframe_enabled_mca(struct drm_dp_aux *aux)
 | |
| {
 | |
| 	int ret;
 | |
| 	u32 val = 0;
 | |
| 	u16 reg = LSPCON_MCA_AVI_IF_CTRL;
 | |
| 
 | |
| 	ret = drm_dp_dpcd_read(aux, reg, &val, 1);
 | |
| 	if (ret < 0) {
 | |
| 		DRM_ERROR("DPCD read failed, address 0x%x\n", reg);
 | |
| 		return false;
 | |
| 	}
 | |
| 
 | |
| 	return val & LSPCON_MCA_AVI_IF_KICKOFF;
 | |
| }
 | |
| 
 | |
| static bool _lspcon_read_avi_infoframe_enabled_parade(struct drm_dp_aux *aux)
 | |
| {
 | |
| 	int ret;
 | |
| 	u32 val = 0;
 | |
| 	u16 reg = LSPCON_PARADE_AVI_IF_CTRL;
 | |
| 
 | |
| 	ret = drm_dp_dpcd_read(aux, reg, &val, 1);
 | |
| 	if (ret < 0) {
 | |
| 		DRM_ERROR("DPCD read failed, address 0x%x\n", reg);
 | |
| 		return false;
 | |
| 	}
 | |
| 
 | |
| 	return val & LSPCON_PARADE_AVI_IF_KICKOFF;
 | |
| }
 | |
| 
 | |
| u32 lspcon_infoframes_enabled(struct intel_encoder *encoder,
 | |
| 			      const struct intel_crtc_state *pipe_config)
 | |
| {
 | |
| 	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
 | |
| 	struct intel_lspcon *lspcon = enc_to_intel_lspcon(encoder);
 | |
| 	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
 | |
| 	bool infoframes_enabled;
 | |
| 	u32 val = 0;
 | |
| 	u32 mask, tmp;
 | |
| 
 | |
| 	if (lspcon->vendor == LSPCON_VENDOR_MCA)
 | |
| 		infoframes_enabled = _lspcon_read_avi_infoframe_enabled_mca(&intel_dp->aux);
 | |
| 	else
 | |
| 		infoframes_enabled = _lspcon_read_avi_infoframe_enabled_parade(&intel_dp->aux);
 | |
| 
 | |
| 	if (infoframes_enabled)
 | |
| 		val |= intel_hdmi_infoframe_enable(HDMI_INFOFRAME_TYPE_AVI);
 | |
| 
 | |
| 	if (lspcon->hdr_supported) {
 | |
| 		tmp = intel_de_read(dev_priv,
 | |
| 				    HSW_TVIDEO_DIP_CTL(pipe_config->cpu_transcoder));
 | |
| 		mask = VIDEO_DIP_ENABLE_GMP_HSW;
 | |
| 
 | |
| 		if (tmp & mask)
 | |
| 			val |= intel_hdmi_infoframe_enable(HDMI_PACKET_TYPE_GAMUT_METADATA);
 | |
| 	}
 | |
| 
 | |
| 	return val;
 | |
| }
 | |
| 
 | |
| void lspcon_wait_pcon_mode(struct intel_lspcon *lspcon)
 | |
| {
 | |
| 	lspcon_wait_mode(lspcon, DRM_LSPCON_MODE_PCON);
 | |
| }
 | |
| 
 | |
| bool lspcon_init(struct intel_digital_port *dig_port)
 | |
| {
 | |
| 	struct intel_dp *dp = &dig_port->dp;
 | |
| 	struct intel_lspcon *lspcon = &dig_port->lspcon;
 | |
| 	struct drm_connector *connector = &dp->attached_connector->base;
 | |
| 
 | |
| 	lspcon->active = false;
 | |
| 	lspcon->mode = DRM_LSPCON_MODE_INVALID;
 | |
| 
 | |
| 	if (!lspcon_probe(lspcon)) {
 | |
| 		DRM_ERROR("Failed to probe lspcon\n");
 | |
| 		return false;
 | |
| 	}
 | |
| 
 | |
| 	if (drm_dp_read_dpcd_caps(&dp->aux, dp->dpcd) != 0) {
 | |
| 		DRM_ERROR("LSPCON DPCD read failed\n");
 | |
| 		return false;
 | |
| 	}
 | |
| 
 | |
| 	if (!lspcon_detect_vendor(lspcon)) {
 | |
| 		DRM_ERROR("LSPCON vendor detection failed\n");
 | |
| 		return false;
 | |
| 	}
 | |
| 
 | |
| 	connector->ycbcr_420_allowed = true;
 | |
| 	lspcon->active = true;
 | |
| 	DRM_DEBUG_KMS("Success: LSPCON init\n");
 | |
| 	return true;
 | |
| }
 | |
| 
 | |
| u32 intel_lspcon_infoframes_enabled(struct intel_encoder *encoder,
 | |
| 				    const struct intel_crtc_state *pipe_config)
 | |
| {
 | |
| 	struct intel_digital_port *dig_port = enc_to_dig_port(encoder);
 | |
| 
 | |
| 	return dig_port->infoframes_enabled(encoder, pipe_config);
 | |
| }
 | |
| 
 | |
| void lspcon_resume(struct intel_digital_port *dig_port)
 | |
| {
 | |
| 	struct intel_lspcon *lspcon = &dig_port->lspcon;
 | |
| 	struct drm_device *dev = dig_port->base.base.dev;
 | |
| 	struct drm_i915_private *dev_priv = to_i915(dev);
 | |
| 	enum drm_lspcon_mode expected_mode;
 | |
| 
 | |
| 	if (!intel_bios_is_lspcon_present(dev_priv, dig_port->base.port))
 | |
| 		return;
 | |
| 
 | |
| 	if (!lspcon->active) {
 | |
| 		if (!lspcon_init(dig_port)) {
 | |
| 			DRM_ERROR("LSPCON init failed on port %c\n",
 | |
| 				  port_name(dig_port->base.port));
 | |
| 			return;
 | |
| 		}
 | |
| 	}
 | |
| 
 | |
| 	if (lspcon_wake_native_aux_ch(lspcon)) {
 | |
| 		expected_mode = DRM_LSPCON_MODE_PCON;
 | |
| 		lspcon_resume_in_pcon_wa(lspcon);
 | |
| 	} else {
 | |
| 		expected_mode = DRM_LSPCON_MODE_LS;
 | |
| 	}
 | |
| 
 | |
| 	if (lspcon_wait_mode(lspcon, expected_mode) == DRM_LSPCON_MODE_PCON)
 | |
| 		return;
 | |
| 
 | |
| 	if (lspcon_change_mode(lspcon, DRM_LSPCON_MODE_PCON))
 | |
| 		DRM_ERROR("LSPCON resume failed\n");
 | |
| 	else
 | |
| 		DRM_DEBUG_KMS("LSPCON resume success\n");
 | |
| }
 |