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60d2b78991
GuC has an interface to set a power profile for the SLPC algorithm. Base mode is default and ensures a balanced performance, power_saving mode has conservative up/down thresholds and is suitable for use with apps that typically need to be power efficient. This will result in lower GT frequencies, thus consuming lower power. Selected power profile will be displayed in this format: $ cat power_profile [base] power_saving $ echo power_saving > power_profile $ cat power_profile base [power_saving] v2: Address review comments (Rodrigo) Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://lore.kernel.org/r/20250903232120.390190-1-vinay.belgaumkar@intel.com Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
47 lines
1.8 KiB
C
47 lines
1.8 KiB
C
/* SPDX-License-Identifier: MIT */
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/*
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* Copyright © 2022 Intel Corporation
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*/
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#ifndef _XE_GUC_PC_H_
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#define _XE_GUC_PC_H_
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#include <linux/types.h>
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struct xe_guc_pc;
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enum slpc_gucrc_mode;
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struct drm_printer;
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int xe_guc_pc_init(struct xe_guc_pc *pc);
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int xe_guc_pc_start(struct xe_guc_pc *pc);
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int xe_guc_pc_stop(struct xe_guc_pc *pc);
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int xe_guc_pc_gucrc_disable(struct xe_guc_pc *pc);
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int xe_guc_pc_override_gucrc_mode(struct xe_guc_pc *pc, enum slpc_gucrc_mode mode);
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int xe_guc_pc_unset_gucrc_mode(struct xe_guc_pc *pc);
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void xe_guc_pc_print(struct xe_guc_pc *pc, struct drm_printer *p);
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u32 xe_guc_pc_get_act_freq(struct xe_guc_pc *pc);
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int xe_guc_pc_get_cur_freq(struct xe_guc_pc *pc, u32 *freq);
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u32 xe_guc_pc_get_cur_freq_fw(struct xe_guc_pc *pc);
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u32 xe_guc_pc_get_rp0_freq(struct xe_guc_pc *pc);
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u32 xe_guc_pc_get_rpa_freq(struct xe_guc_pc *pc);
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u32 xe_guc_pc_get_rpe_freq(struct xe_guc_pc *pc);
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u32 xe_guc_pc_get_rpn_freq(struct xe_guc_pc *pc);
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int xe_guc_pc_get_min_freq(struct xe_guc_pc *pc, u32 *freq);
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int xe_guc_pc_set_min_freq(struct xe_guc_pc *pc, u32 freq);
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int xe_guc_pc_get_max_freq(struct xe_guc_pc *pc, u32 *freq);
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int xe_guc_pc_set_max_freq(struct xe_guc_pc *pc, u32 freq);
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int xe_guc_pc_set_power_profile(struct xe_guc_pc *pc, const char *buf);
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void xe_guc_pc_get_power_profile(struct xe_guc_pc *pc, char *profile);
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enum xe_gt_idle_state xe_guc_pc_c_status(struct xe_guc_pc *pc);
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u64 xe_guc_pc_rc6_residency(struct xe_guc_pc *pc);
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u64 xe_guc_pc_mc6_residency(struct xe_guc_pc *pc);
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void xe_guc_pc_init_early(struct xe_guc_pc *pc);
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int xe_guc_pc_restore_stashed_freq(struct xe_guc_pc *pc);
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void xe_guc_pc_raise_unslice(struct xe_guc_pc *pc);
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void xe_guc_pc_apply_flush_freq_limit(struct xe_guc_pc *pc);
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void xe_guc_pc_remove_flush_freq_limit(struct xe_guc_pc *pc);
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#endif /* _XE_GUC_PC_H_ */
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