Reza Amini 471c1dd954 drm/amd/display: Allow asic specific FSFT timing optimization ... [Why] Each asic can optimize best based on its capabilities [How] Optimizing timing for a new pixel clock Signed-off-by: Reza Amini <Reza.Amini@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Eryk Brol <eryk.brol@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2020-08-06 16:40:18 -04:00
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dcn21_hubbub.c	drm/amd/display: correct rn NUM_VMID	2020-05-21 12:48:43 -04:00
dcn21_hubbub.h	drm/amd/display: optimize prgoram wm and clks	2020-02-25 11:09:37 -05:00
dcn21_hubp.c	drm/amd/display: Remove nv12 work around	2020-05-28 14:00:48 -04:00
dcn21_hubp.h	drm/amd/display: update chroma viewport wa	2019-12-18 16:09:08 -05:00
dcn21_hwseq.c	drm/amd/display: Implement some asic specific abm call backs.	2020-05-28 14:00:48 -04:00
dcn21_hwseq.h	drm/amd/display: Implement some asic specific abm call backs.	2020-05-28 14:00:48 -04:00
dcn21_init.c	drm/amd/display: Allow asic specific FSFT timing optimization	2020-08-06 16:40:18 -04:00
dcn21_init.h	drm/amd/display: cleanup of function pointer tables	2019-11-19 10:12:53 -05:00
dcn21_link_encoder.c	drm/amd/display: determine USB C DP2 mode only when USB DP Alt is enabled	2020-04-09 10:43:17 -04:00
dcn21_link_encoder.h	drm/amd/display: add missing dcn link encoder regs	2019-12-18 16:09:06 -05:00
dcn21_resource.c	drm/amd/display: interface to obtain minimum plane size caps	2020-07-21 15:37:39 -04:00
dcn21_resource.h
Makefile	amdgpu: Enable initial DCN support on POWER	2019-12-18 16:09:05 -05:00