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4d79a1266d
The irq.enabled flag was protected by a spin lock (irq.lock). By making it atomic we no longer need to wait for the spin lock in irq handlers. This will become especially useful for MSI-X irq handlers to prevent lock contention between different interrupts. Signed-off-by: Ilia Levi <ilia.levi@intel.com> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20241210173506.202150-1-ilia.levi@intel.com Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
63 lines
1.7 KiB
C
63 lines
1.7 KiB
C
// SPDX-License-Identifier: MIT
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/*
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* Copyright © 2023 Intel Corporation
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*/
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#include "i915_irq.h"
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#include "i915_reg.h"
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#include "intel_uncore.h"
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void gen2_irq_reset(struct intel_uncore *uncore, struct i915_irq_regs regs)
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{
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intel_uncore_write(uncore, regs.imr, 0xffffffff);
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intel_uncore_posting_read(uncore, regs.imr);
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intel_uncore_write(uncore, regs.ier, 0);
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/* IIR can theoretically queue up two events. Be paranoid. */
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intel_uncore_write(uncore, regs.iir, 0xffffffff);
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intel_uncore_posting_read(uncore, regs.iir);
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intel_uncore_write(uncore, regs.iir, 0xffffffff);
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intel_uncore_posting_read(uncore, regs.iir);
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}
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/*
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* We should clear IMR at preinstall/uninstall, and just check at postinstall.
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*/
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void gen2_assert_iir_is_zero(struct intel_uncore *uncore, i915_reg_t reg)
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{
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struct xe_device *xe = container_of(uncore, struct xe_device, uncore);
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u32 val = intel_uncore_read(uncore, reg);
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if (val == 0)
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return;
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drm_WARN(&xe->drm, 1,
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"Interrupt register 0x%x is not zero: 0x%08x\n",
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i915_mmio_reg_offset(reg), val);
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intel_uncore_write(uncore, reg, 0xffffffff);
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intel_uncore_posting_read(uncore, reg);
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intel_uncore_write(uncore, reg, 0xffffffff);
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intel_uncore_posting_read(uncore, reg);
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}
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void gen2_irq_init(struct intel_uncore *uncore, struct i915_irq_regs regs,
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u32 imr_val, u32 ier_val)
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{
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gen2_assert_iir_is_zero(uncore, regs.iir);
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intel_uncore_write(uncore, regs.ier, ier_val);
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intel_uncore_write(uncore, regs.imr, imr_val);
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intel_uncore_posting_read(uncore, regs.imr);
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}
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bool intel_irqs_enabled(struct xe_device *xe)
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{
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return atomic_read(&xe->irq.enabled);
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}
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void intel_synchronize_irq(struct xe_device *xe)
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{
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synchronize_irq(to_pci_dev(xe->drm.dev)->irq);
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}
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