George Shen 83626efdce drm/amd/display: Disable MPC rate control on ODM pipe update ... [Why] Seamless boot skips MPC init for the active pipe, resulting in stale MPC rate control state being retained. This will cause issues since other logic assumes it is disabled (as DCN30 and newer does not need it). [How] Disable MPC rate control on ODM pipe update to cover the seamless boot case. Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Reviewed-by: Alvin Lee <alvin.lee2@amd.com> Signed-off-by: George Shen <george.shen@amd.com> Signed-off-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2024-12-18 12:21:50 -05:00
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dcn10
dcn20
dcn30	drm/amd/display: Disable MPC rate control on ODM pipe update	2024-12-18 12:21:50 -05:00
dcn32
dcn401
Makefile