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			331 lines
		
	
	
		
			8.3 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			331 lines
		
	
	
		
			8.3 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * amd76xrom.c
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|  *
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|  * Normal mappings of chips in physical memory
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|  * $Id: amd76xrom.c,v 1.21 2005/11/07 11:14:26 gleixner Exp $
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|  */
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| 
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| #include <linux/module.h>
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| #include <linux/types.h>
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| #include <linux/kernel.h>
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| #include <linux/init.h>
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| #include <asm/io.h>
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| #include <linux/mtd/mtd.h>
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| #include <linux/mtd/map.h>
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| #include <linux/mtd/cfi.h>
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| #include <linux/mtd/flashchip.h>
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| #include <linux/config.h>
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| #include <linux/pci.h>
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| #include <linux/pci_ids.h>
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| #include <linux/list.h>
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| 
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| 
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| #define xstr(s) str(s)
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| #define str(s) #s
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| #define MOD_NAME xstr(KBUILD_BASENAME)
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| 
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| #define ADDRESS_NAME_LEN 18
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| 
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| #define ROM_PROBE_STEP_SIZE (64*1024) /* 64KiB */
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| 
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| struct amd76xrom_window {
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| 	void __iomem *virt;
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| 	unsigned long phys;
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| 	unsigned long size;
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| 	struct list_head maps;
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| 	struct resource rsrc;
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| 	struct pci_dev *pdev;
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| };
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| 
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| struct amd76xrom_map_info {
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| 	struct list_head list;
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| 	struct map_info map;
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| 	struct mtd_info *mtd;
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| 	struct resource rsrc;
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| 	char map_name[sizeof(MOD_NAME) + 2 + ADDRESS_NAME_LEN];
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| };
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| 
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| static struct amd76xrom_window amd76xrom_window = {
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| 	.maps = LIST_HEAD_INIT(amd76xrom_window.maps),
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| };
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| 
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| static void amd76xrom_cleanup(struct amd76xrom_window *window)
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| {
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| 	struct amd76xrom_map_info *map, *scratch;
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| 	u8 byte;
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| 
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| 	if (window->pdev) {
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| 		/* Disable writes through the rom window */
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| 		pci_read_config_byte(window->pdev, 0x40, &byte);
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| 		pci_write_config_byte(window->pdev, 0x40, byte & ~1);
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| 	}
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| 
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| 	/* Free all of the mtd devices */
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| 	list_for_each_entry_safe(map, scratch, &window->maps, list) {
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| 		if (map->rsrc.parent) {
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| 			release_resource(&map->rsrc);
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| 		}
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| 		del_mtd_device(map->mtd);
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| 		map_destroy(map->mtd);
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| 		list_del(&map->list);
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| 		kfree(map);
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| 	}
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| 	if (window->rsrc.parent)
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| 		release_resource(&window->rsrc);
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| 
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| 	if (window->virt) {
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| 		iounmap(window->virt);
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| 		window->virt = NULL;
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| 		window->phys = 0;
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| 		window->size = 0;
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| 		window->pdev = NULL;
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| 	}
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| }
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| 
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| 
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| static int __devinit amd76xrom_init_one (struct pci_dev *pdev,
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| 	const struct pci_device_id *ent)
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| {
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| 	static char *rom_probe_types[] = { "cfi_probe", "jedec_probe", NULL };
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| 	u8 byte;
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| 	struct amd76xrom_window *window = &amd76xrom_window;
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| 	struct amd76xrom_map_info *map = NULL;
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| 	unsigned long map_top;
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| 
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| 	/* Remember the pci dev I find the window in */
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| 	window->pdev = pdev;
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| 
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| 	/* Assume the rom window is properly setup, and find it's size */
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| 	pci_read_config_byte(pdev, 0x43, &byte);
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| 	if ((byte & ((1<<7)|(1<<6))) == ((1<<7)|(1<<6))) {
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| 		window->phys = 0xffb00000; /* 5MiB */
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| 	}
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| 	else if ((byte & (1<<7)) == (1<<7)) {
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| 		window->phys = 0xffc00000; /* 4MiB */
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| 	}
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| 	else {
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| 		window->phys = 0xffff0000; /* 64KiB */
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| 	}
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| 	window->size = 0xffffffffUL - window->phys + 1UL;
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| 
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| 	/*
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| 	 * Try to reserve the window mem region.  If this fails then
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| 	 * it is likely due to a fragment of the window being
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| 	 * "reseved" by the BIOS.  In the case that the
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| 	 * request_mem_region() fails then once the rom size is
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| 	 * discovered we will try to reserve the unreserved fragment.
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| 	 */
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| 	window->rsrc.name = MOD_NAME;
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| 	window->rsrc.start = window->phys;
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| 	window->rsrc.end   = window->phys + window->size - 1;
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| 	window->rsrc.flags = IORESOURCE_MEM | IORESOURCE_BUSY;
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| 	if (request_resource(&iomem_resource, &window->rsrc)) {
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| 		window->rsrc.parent = NULL;
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| 		printk(KERN_ERR MOD_NAME
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| 			" %s(): Unable to register resource"
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| 			" 0x%.08lx-0x%.08lx - kernel bug?\n",
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| 			__func__,
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| 			window->rsrc.start, window->rsrc.end);
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| 	}
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| 
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| #if 0
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| 
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| 	/* Enable the selected rom window */
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| 	pci_read_config_byte(pdev, 0x43, &byte);
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| 	pci_write_config_byte(pdev, 0x43, byte | rwindow->segen_bits);
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| #endif
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| 
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| 	/* Enable writes through the rom window */
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| 	pci_read_config_byte(pdev, 0x40, &byte);
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| 	pci_write_config_byte(pdev, 0x40, byte | 1);
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| 
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| 	/* FIXME handle registers 0x80 - 0x8C the bios region locks */
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| 
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| 	/* For write accesses caches are useless */
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| 	window->virt = ioremap_nocache(window->phys, window->size);
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| 	if (!window->virt) {
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| 		printk(KERN_ERR MOD_NAME ": ioremap(%08lx, %08lx) failed\n",
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| 			window->phys, window->size);
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| 		goto out;
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| 	}
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| 
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| 	/* Get the first address to look for an rom chip at */
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| 	map_top = window->phys;
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| #if 1
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| 	/* The probe sequence run over the firmware hub lock
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| 	 * registers sets them to 0x7 (no access).
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| 	 * Probe at most the last 4M of the address space.
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| 	 */
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| 	if (map_top < 0xffc00000) {
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| 		map_top = 0xffc00000;
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| 	}
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| #endif
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| 	/* Loop  through and look for rom chips */
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| 	while((map_top - 1) < 0xffffffffUL) {
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| 		struct cfi_private *cfi;
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| 		unsigned long offset;
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| 		int i;
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| 
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| 		if (!map) {
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| 			map = kmalloc(sizeof(*map), GFP_KERNEL);
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| 		}
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| 		if (!map) {
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| 			printk(KERN_ERR MOD_NAME ": kmalloc failed");
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| 			goto out;
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| 		}
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| 		memset(map, 0, sizeof(*map));
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| 		INIT_LIST_HEAD(&map->list);
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| 		map->map.name = map->map_name;
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| 		map->map.phys = map_top;
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| 		offset = map_top - window->phys;
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| 		map->map.virt = (void __iomem *)
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| 			(((unsigned long)(window->virt)) + offset);
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| 		map->map.size = 0xffffffffUL - map_top + 1UL;
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| 		/* Set the name of the map to the address I am trying */
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| 		sprintf(map->map_name, "%s @%08lx",
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| 			MOD_NAME, map->map.phys);
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| 
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| 		/* There is no generic VPP support */
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| 		for(map->map.bankwidth = 32; map->map.bankwidth;
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| 			map->map.bankwidth >>= 1)
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| 		{
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| 			char **probe_type;
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| 			/* Skip bankwidths that are not supported */
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| 			if (!map_bankwidth_supported(map->map.bankwidth))
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| 				continue;
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| 
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| 			/* Setup the map methods */
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| 			simple_map_init(&map->map);
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| 
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| 			/* Try all of the probe methods */
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| 			probe_type = rom_probe_types;
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| 			for(; *probe_type; probe_type++) {
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| 				map->mtd = do_map_probe(*probe_type, &map->map);
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| 				if (map->mtd)
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| 					goto found;
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| 			}
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| 		}
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| 		map_top += ROM_PROBE_STEP_SIZE;
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| 		continue;
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| 	found:
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| 		/* Trim the size if we are larger than the map */
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| 		if (map->mtd->size > map->map.size) {
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| 			printk(KERN_WARNING MOD_NAME
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| 				" rom(%u) larger than window(%lu). fixing...\n",
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| 				map->mtd->size, map->map.size);
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| 			map->mtd->size = map->map.size;
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| 		}
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| 		if (window->rsrc.parent) {
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| 			/*
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| 			 * Registering the MTD device in iomem may not be possible
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| 			 * if there is a BIOS "reserved" and BUSY range.  If this
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| 			 * fails then continue anyway.
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| 			 */
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| 			map->rsrc.name  = map->map_name;
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| 			map->rsrc.start = map->map.phys;
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| 			map->rsrc.end   = map->map.phys + map->mtd->size - 1;
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| 			map->rsrc.flags = IORESOURCE_MEM | IORESOURCE_BUSY;
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| 			if (request_resource(&window->rsrc, &map->rsrc)) {
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| 				printk(KERN_ERR MOD_NAME
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| 					": cannot reserve MTD resource\n");
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| 				map->rsrc.parent = NULL;
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| 			}
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| 		}
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| 
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| 		/* Make the whole region visible in the map */
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| 		map->map.virt = window->virt;
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| 		map->map.phys = window->phys;
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| 		cfi = map->map.fldrv_priv;
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| 		for(i = 0; i < cfi->numchips; i++) {
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| 			cfi->chips[i].start += offset;
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| 		}
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| 
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| 		/* Now that the mtd devices is complete claim and export it */
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| 		map->mtd->owner = THIS_MODULE;
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| 		if (add_mtd_device(map->mtd)) {
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| 			map_destroy(map->mtd);
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| 			map->mtd = NULL;
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| 			goto out;
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| 		}
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| 
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| 
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| 		/* Calculate the new value of map_top */
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| 		map_top += map->mtd->size;
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| 
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| 		/* File away the map structure */
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| 		list_add(&map->list, &window->maps);
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| 		map = NULL;
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| 	}
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| 
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|  out:
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| 	/* Free any left over map structures */
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| 	kfree(map);
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| 	/* See if I have any map structures */
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| 	if (list_empty(&window->maps)) {
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| 		amd76xrom_cleanup(window);
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| 		return -ENODEV;
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| 	}
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| 	return 0;
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| }
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| 
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| 
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| static void __devexit amd76xrom_remove_one (struct pci_dev *pdev)
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| {
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| 	struct amd76xrom_window *window = &amd76xrom_window;
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| 
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| 	amd76xrom_cleanup(window);
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| }
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| 
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| static struct pci_device_id amd76xrom_pci_tbl[] = {
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| 	{ PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_VIPER_7410,
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| 		PCI_ANY_ID, PCI_ANY_ID, },
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| 	{ PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_VIPER_7440,
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| 		PCI_ANY_ID, PCI_ANY_ID, },
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| 	{ PCI_VENDOR_ID_AMD, 0x7468 }, /* amd8111 support */
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| 	{ 0, }
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| };
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| 
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| MODULE_DEVICE_TABLE(pci, amd76xrom_pci_tbl);
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| 
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| #if 0
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| static struct pci_driver amd76xrom_driver = {
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| 	.name =		MOD_NAME,
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| 	.id_table =	amd76xrom_pci_tbl,
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| 	.probe =	amd76xrom_init_one,
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| 	.remove =	amd76xrom_remove_one,
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| };
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| #endif
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| 
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| static int __init init_amd76xrom(void)
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| {
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| 	struct pci_dev *pdev;
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| 	struct pci_device_id *id;
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| 	pdev = NULL;
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| 	for(id = amd76xrom_pci_tbl; id->vendor; id++) {
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| 		pdev = pci_find_device(id->vendor, id->device, NULL);
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| 		if (pdev) {
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| 			break;
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| 		}
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| 	}
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| 	if (pdev) {
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| 		return amd76xrom_init_one(pdev, &amd76xrom_pci_tbl[0]);
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| 	}
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| 	return -ENXIO;
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| #if 0
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| 	return pci_register_driver(&amd76xrom_driver);
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| #endif
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| }
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| 
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| static void __exit cleanup_amd76xrom(void)
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| {
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| 	amd76xrom_remove_one(amd76xrom_window.pdev);
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| }
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| 
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| module_init(init_amd76xrom);
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| module_exit(cleanup_amd76xrom);
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| 
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| MODULE_LICENSE("GPL");
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| MODULE_AUTHOR("Eric Biederman <ebiederman@lnxi.com>");
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| MODULE_DESCRIPTION("MTD map driver for BIOS chips on the AMD76X southbridge");
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| 
 | 
