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67e3ba9783
Airoha AN7583 SoC have 2 dedicated MDIO bus controller in the SCU register map. To driver register an MDIO controller based on the DT reg property and access the register by accessing the parent syscon. The MDIO bus logic is similar to the MT7530 internal MDIO bus but deviates of some setting and some HW bug. On Airoha AN7583 the MDIO clock is set to 25MHz by default and needs to be correctly setup to 2.5MHz to correctly work (by setting the divisor to 10x). There seems to be Hardware bug where AN7583_MII_RWDATA is not wiped in the context of unconnected PHY and the previous read value is returned. Example: (only one PHY on the BUS at 0x1f) - read at 0x1f report at 0x2 0x7500 - read at 0x0 report 0x7500 on every address To workaround this, we reset the Mdio BUS at every read to have consistent values on read operation. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net> |
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| .. | ||
| acpi_mdio.c | ||
| fwnode_mdio.c | ||
| Kconfig | ||
| Makefile | ||
| mdio-airoha.c | ||
| mdio-aspeed.c | ||
| mdio-bcm-iproc.c | ||
| mdio-bcm-unimac.c | ||
| mdio-bitbang.c | ||
| mdio-cavium.c | ||
| mdio-cavium.h | ||
| mdio-gpio.c | ||
| mdio-hisi-femac.c | ||
| mdio-i2c.c | ||
| mdio-ipq4019.c | ||
| mdio-ipq8064.c | ||
| mdio-moxart.c | ||
| mdio-mscc-miim.c | ||
| mdio-mux-bcm6368.c | ||
| mdio-mux-bcm-iproc.c | ||
| mdio-mux-gpio.c | ||
| mdio-mux-meson-g12a.c | ||
| mdio-mux-meson-gxl.c | ||
| mdio-mux-mmioreg.c | ||
| mdio-mux-multiplexer.c | ||
| mdio-mux.c | ||
| mdio-mvusb.c | ||
| mdio-octeon.c | ||
| mdio-realtek-rtl9300.c | ||
| mdio-regmap.c | ||
| mdio-sun4i.c | ||
| mdio-thunder.c | ||
| mdio-xgene.c | ||
| of_mdio.c | ||