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![]() According to the datasheet, BCM5325 uses B53_PD_MODE_CTRL_25 register to disable clocking to individual PHYs. Only ports 1-4 can be enabled or disabled and the datasheet is explicit about not toggling BIT(0) since it disables the PLL power and the switch. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com> Link: https://patch.msgid.link/20250614080000.1884236-15-noltari@gmail.com Signed-off-by: Jakub Kicinski <kuba@kernel.org> |
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.. | ||
b53_common.c | ||
b53_mdio.c | ||
b53_mmap.c | ||
b53_priv.h | ||
b53_regs.h | ||
b53_serdes.c | ||
b53_serdes.h | ||
b53_spi.c | ||
b53_srab.c | ||
Kconfig | ||
Makefile |