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2930db123f
To deterministically capture the transition of the state machine going from SRDOFFACK to IDLE, the delayed V. Blank should be at least one line after the non-delayed V. Blank. Ensure this by adding new interface into intel_psr to query number of lines needed for vblank delay and call it from intel_crtc_vblank_delay. v3: use existing intel_crtc_vblank_delay mechanism v2: apply limits only when needed (VRR TG vs. Legacy TG) Bspec: 69897 Signed-off-by: Jouni Högander <jouni.hogander@intel.com> Reviewed-by: Arun R Murthy <arun.r.murthy@intel.com> Link: https://lore.kernel.org/r/20250423102704.1368310-1-jouni.hogander@intel.com
82 lines
3.4 KiB
C
82 lines
3.4 KiB
C
/* SPDX-License-Identifier: MIT */
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/*
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* Copyright © 2019 Intel Corporation
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*/
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#ifndef __INTEL_PSR_H__
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#define __INTEL_PSR_H__
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#include <linux/types.h>
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enum fb_op_origin;
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struct drm_connector;
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struct drm_connector_state;
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struct intel_atomic_state;
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struct intel_connector;
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struct intel_crtc;
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struct intel_crtc_state;
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struct intel_display;
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struct intel_dp;
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struct intel_dsb;
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struct intel_encoder;
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struct intel_plane;
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struct intel_plane_state;
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#define CAN_PANEL_REPLAY(intel_dp) ((intel_dp)->psr.sink_panel_replay_support && \
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(intel_dp)->psr.source_panel_replay_support)
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bool intel_encoder_can_psr(struct intel_encoder *encoder);
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bool intel_psr_needs_aux_io_power(struct intel_encoder *encoder,
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const struct intel_crtc_state *crtc_state);
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void intel_psr_init_dpcd(struct intel_dp *intel_dp);
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void intel_psr_panel_replay_enable_sink(struct intel_dp *intel_dp);
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void intel_psr_pre_plane_update(struct intel_atomic_state *state,
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struct intel_crtc *crtc);
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void intel_psr_post_plane_update(struct intel_atomic_state *state,
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struct intel_crtc *crtc);
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void intel_psr_disable(struct intel_dp *intel_dp,
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const struct intel_crtc_state *old_crtc_state);
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int intel_psr_debug_set(struct intel_dp *intel_dp, u64 value);
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void intel_psr_invalidate(struct intel_display *display,
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unsigned frontbuffer_bits,
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enum fb_op_origin origin);
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void intel_psr_flush(struct intel_display *display,
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unsigned frontbuffer_bits,
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enum fb_op_origin origin);
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void intel_psr_init(struct intel_dp *intel_dp);
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void intel_psr_compute_config(struct intel_dp *intel_dp,
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struct intel_crtc_state *crtc_state,
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struct drm_connector_state *conn_state);
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void intel_psr_get_config(struct intel_encoder *encoder,
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struct intel_crtc_state *pipe_config);
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void intel_psr_irq_handler(struct intel_dp *intel_dp, u32 psr_iir);
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void intel_psr_short_pulse(struct intel_dp *intel_dp);
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void intel_psr_wait_for_idle_locked(const struct intel_crtc_state *new_crtc_state);
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bool intel_psr_enabled(struct intel_dp *intel_dp);
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int intel_psr2_sel_fetch_update(struct intel_atomic_state *state,
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struct intel_crtc *crtc);
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void intel_psr2_program_trans_man_trk_ctl(struct intel_dsb *dsb,
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const struct intel_crtc_state *crtc_state);
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void intel_psr_pause(struct intel_dp *intel_dp);
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void intel_psr_resume(struct intel_dp *intel_dp);
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bool intel_psr_needs_vblank_notification(const struct intel_crtc_state *crtc_state);
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void intel_psr_notify_pipe_change(struct intel_atomic_state *state,
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struct intel_crtc *crtc, bool enable);
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void intel_psr_notify_dc5_dc6(struct intel_display *display);
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void intel_psr_dc5_dc6_wa_init(struct intel_display *display);
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void intel_psr_notify_vblank_enable_disable(struct intel_display *display,
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bool enable);
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bool intel_psr_link_ok(struct intel_dp *intel_dp);
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void intel_psr_lock(const struct intel_crtc_state *crtc_state);
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void intel_psr_unlock(const struct intel_crtc_state *crtc_state);
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void intel_psr_trigger_frame_change_event(struct intel_dsb *dsb,
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struct intel_atomic_state *state,
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struct intel_crtc *crtc);
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int intel_psr_min_vblank_delay(const struct intel_crtc_state *crtc_state);
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void intel_psr_connector_debugfs_add(struct intel_connector *connector);
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void intel_psr_debugfs_register(struct intel_display *display);
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bool intel_psr_needs_alpm(struct intel_dp *intel_dp, const struct intel_crtc_state *crtc_state);
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#endif /* __INTEL_PSR_H__ */
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