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To save/restore LBR call stack data in system-wide mode, the task_struct information is required. Extend the parameters of sched_task() to supply task_struct information. When schedule in, the LBR call stack data for new task will be restored. When schedule out, the LBR call stack data for old task will be saved. Only need to pass the required task_struct information. Signed-off-by: Kan Liang <kan.liang@linux.intel.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://lore.kernel.org/r/20250314172700.438923-4-kan.liang@linux.intel.com
863 lines
24 KiB
C
863 lines
24 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Performance event support - Processor Activity Instrumentation Facility
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*
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* Copyright IBM Corp. 2022
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* Author(s): Thomas Richter <tmricht@linux.ibm.com>
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*/
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#define KMSG_COMPONENT "pai_crypto"
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#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
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#include <linux/kernel.h>
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#include <linux/kernel_stat.h>
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#include <linux/percpu.h>
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#include <linux/notifier.h>
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#include <linux/init.h>
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#include <linux/export.h>
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#include <linux/io.h>
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#include <linux/perf_event.h>
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#include <asm/ctlreg.h>
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#include <asm/pai.h>
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#include <asm/debug.h>
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static debug_info_t *cfm_dbg;
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static unsigned int paicrypt_cnt; /* Size of the mapped counter sets */
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/* extracted with QPACI instruction */
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DEFINE_STATIC_KEY_FALSE(pai_key);
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struct pai_userdata {
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u16 num;
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u64 value;
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} __packed;
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struct paicrypt_map {
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unsigned long *page; /* Page for CPU to store counters */
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struct pai_userdata *save; /* Page to store no-zero counters */
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unsigned int active_events; /* # of PAI crypto users */
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refcount_t refcnt; /* Reference count mapped buffers */
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struct perf_event *event; /* Perf event for sampling */
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struct list_head syswide_list; /* List system-wide sampling events */
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};
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struct paicrypt_mapptr {
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struct paicrypt_map *mapptr;
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};
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static struct paicrypt_root { /* Anchor to per CPU data */
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refcount_t refcnt; /* Overall active events */
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struct paicrypt_mapptr __percpu *mapptr;
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} paicrypt_root;
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/* Free per CPU data when the last event is removed. */
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static void paicrypt_root_free(void)
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{
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if (refcount_dec_and_test(&paicrypt_root.refcnt)) {
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free_percpu(paicrypt_root.mapptr);
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paicrypt_root.mapptr = NULL;
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}
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debug_sprintf_event(cfm_dbg, 5, "%s root.refcount %d\n", __func__,
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refcount_read(&paicrypt_root.refcnt));
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}
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/*
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* On initialization of first event also allocate per CPU data dynamically.
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* Start with an array of pointers, the array size is the maximum number of
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* CPUs possible, which might be larger than the number of CPUs currently
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* online.
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*/
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static int paicrypt_root_alloc(void)
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{
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if (!refcount_inc_not_zero(&paicrypt_root.refcnt)) {
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/* The memory is already zeroed. */
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paicrypt_root.mapptr = alloc_percpu(struct paicrypt_mapptr);
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if (!paicrypt_root.mapptr)
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return -ENOMEM;
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refcount_set(&paicrypt_root.refcnt, 1);
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}
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return 0;
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}
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/* Release the PMU if event is the last perf event */
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static DEFINE_MUTEX(pai_reserve_mutex);
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/* Adjust usage counters and remove allocated memory when all users are
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* gone.
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*/
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static void paicrypt_event_destroy_cpu(struct perf_event *event, int cpu)
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{
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struct paicrypt_mapptr *mp = per_cpu_ptr(paicrypt_root.mapptr, cpu);
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struct paicrypt_map *cpump = mp->mapptr;
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mutex_lock(&pai_reserve_mutex);
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debug_sprintf_event(cfm_dbg, 5, "%s event %#llx cpu %d users %d "
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"refcnt %u\n", __func__, event->attr.config,
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event->cpu, cpump->active_events,
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refcount_read(&cpump->refcnt));
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if (refcount_dec_and_test(&cpump->refcnt)) {
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debug_sprintf_event(cfm_dbg, 4, "%s page %#lx save %p\n",
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__func__, (unsigned long)cpump->page,
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cpump->save);
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free_page((unsigned long)cpump->page);
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kvfree(cpump->save);
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kfree(cpump);
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mp->mapptr = NULL;
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}
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paicrypt_root_free();
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mutex_unlock(&pai_reserve_mutex);
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}
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static void paicrypt_event_destroy(struct perf_event *event)
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{
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int cpu;
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static_branch_dec(&pai_key);
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free_page(PAI_SAVE_AREA(event));
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if (event->cpu == -1) {
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struct cpumask *mask = PAI_CPU_MASK(event);
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for_each_cpu(cpu, mask)
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paicrypt_event_destroy_cpu(event, cpu);
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kfree(mask);
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} else {
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paicrypt_event_destroy_cpu(event, event->cpu);
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}
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}
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static u64 paicrypt_getctr(unsigned long *page, int nr, bool kernel)
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{
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if (kernel)
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nr += PAI_CRYPTO_MAXCTR;
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return page[nr];
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}
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/* Read the counter values. Return value from location in CMP. For event
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* CRYPTO_ALL sum up all events.
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*/
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static u64 paicrypt_getdata(struct perf_event *event, bool kernel)
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{
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struct paicrypt_mapptr *mp = this_cpu_ptr(paicrypt_root.mapptr);
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struct paicrypt_map *cpump = mp->mapptr;
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u64 sum = 0;
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int i;
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if (event->attr.config != PAI_CRYPTO_BASE) {
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return paicrypt_getctr(cpump->page,
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event->attr.config - PAI_CRYPTO_BASE,
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kernel);
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}
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for (i = 1; i <= paicrypt_cnt; i++) {
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u64 val = paicrypt_getctr(cpump->page, i, kernel);
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if (!val)
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continue;
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sum += val;
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}
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return sum;
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}
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static u64 paicrypt_getall(struct perf_event *event)
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{
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u64 sum = 0;
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if (!event->attr.exclude_kernel)
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sum += paicrypt_getdata(event, true);
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if (!event->attr.exclude_user)
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sum += paicrypt_getdata(event, false);
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return sum;
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}
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/* Check concurrent access of counting and sampling for crypto events.
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* This function is called in process context and it is save to block.
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* When the event initialization functions fails, no other call back will
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* be invoked.
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*
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* Allocate the memory for the event.
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*/
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static struct paicrypt_map *paicrypt_busy(struct perf_event *event, int cpu)
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{
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struct paicrypt_map *cpump = NULL;
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struct paicrypt_mapptr *mp;
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int rc;
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mutex_lock(&pai_reserve_mutex);
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/* Allocate root node */
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rc = paicrypt_root_alloc();
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if (rc)
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goto unlock;
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/* Allocate node for this event */
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mp = per_cpu_ptr(paicrypt_root.mapptr, cpu);
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cpump = mp->mapptr;
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if (!cpump) { /* Paicrypt_map allocated? */
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cpump = kzalloc(sizeof(*cpump), GFP_KERNEL);
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if (!cpump) {
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rc = -ENOMEM;
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goto free_root;
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}
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INIT_LIST_HEAD(&cpump->syswide_list);
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}
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/* Allocate memory for counter page and counter extraction.
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* Only the first counting event has to allocate a page.
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*/
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if (cpump->page) {
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refcount_inc(&cpump->refcnt);
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goto unlock;
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}
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rc = -ENOMEM;
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cpump->page = (unsigned long *)get_zeroed_page(GFP_KERNEL);
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if (!cpump->page)
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goto free_paicrypt_map;
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cpump->save = kvmalloc_array(paicrypt_cnt + 1,
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sizeof(struct pai_userdata), GFP_KERNEL);
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if (!cpump->save) {
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free_page((unsigned long)cpump->page);
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cpump->page = NULL;
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goto free_paicrypt_map;
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}
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/* Set mode and reference count */
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rc = 0;
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refcount_set(&cpump->refcnt, 1);
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mp->mapptr = cpump;
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debug_sprintf_event(cfm_dbg, 5, "%s users %d refcnt %u page %#lx "
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"save %p rc %d\n", __func__, cpump->active_events,
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refcount_read(&cpump->refcnt),
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(unsigned long)cpump->page, cpump->save, rc);
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goto unlock;
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free_paicrypt_map:
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/* Undo memory allocation */
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kfree(cpump);
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mp->mapptr = NULL;
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free_root:
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paicrypt_root_free();
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unlock:
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mutex_unlock(&pai_reserve_mutex);
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return rc ? ERR_PTR(rc) : cpump;
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}
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static int paicrypt_event_init_all(struct perf_event *event)
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{
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struct paicrypt_map *cpump;
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struct cpumask *maskptr;
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int cpu, rc = -ENOMEM;
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maskptr = kzalloc(sizeof(*maskptr), GFP_KERNEL);
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if (!maskptr)
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goto out;
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for_each_online_cpu(cpu) {
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cpump = paicrypt_busy(event, cpu);
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if (IS_ERR(cpump)) {
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for_each_cpu(cpu, maskptr)
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paicrypt_event_destroy_cpu(event, cpu);
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kfree(maskptr);
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rc = PTR_ERR(cpump);
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goto out;
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}
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cpumask_set_cpu(cpu, maskptr);
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}
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/*
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* On error all cpumask are freed and all events have been destroyed.
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* Save of which CPUs data structures have been allocated for.
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* Release them in paicrypt_event_destroy call back function
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* for this event.
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*/
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PAI_CPU_MASK(event) = maskptr;
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rc = 0;
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out:
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return rc;
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}
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/* Might be called on different CPU than the one the event is intended for. */
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static int paicrypt_event_init(struct perf_event *event)
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{
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struct perf_event_attr *a = &event->attr;
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struct paicrypt_map *cpump;
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int rc = 0;
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/* PAI crypto PMU registered as PERF_TYPE_RAW, check event type */
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if (a->type != PERF_TYPE_RAW && event->pmu->type != a->type)
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return -ENOENT;
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/* PAI crypto event must be in valid range */
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if (a->config < PAI_CRYPTO_BASE ||
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a->config > PAI_CRYPTO_BASE + paicrypt_cnt)
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return -EINVAL;
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/* Allow only CRYPTO_ALL for sampling */
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if (a->sample_period && a->config != PAI_CRYPTO_BASE)
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return -EINVAL;
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/* Get a page to store last counter values for sampling */
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if (a->sample_period) {
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PAI_SAVE_AREA(event) = get_zeroed_page(GFP_KERNEL);
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if (!PAI_SAVE_AREA(event)) {
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rc = -ENOMEM;
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goto out;
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}
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}
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if (event->cpu >= 0) {
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cpump = paicrypt_busy(event, event->cpu);
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if (IS_ERR(cpump))
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rc = PTR_ERR(cpump);
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} else {
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rc = paicrypt_event_init_all(event);
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}
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if (rc) {
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free_page(PAI_SAVE_AREA(event));
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goto out;
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}
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event->destroy = paicrypt_event_destroy;
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if (a->sample_period) {
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a->sample_period = 1;
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a->freq = 0;
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/* Register for paicrypt_sched_task() to be called */
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event->attach_state |= PERF_ATTACH_SCHED_CB;
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/* Add raw data which contain the memory mapped counters */
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a->sample_type |= PERF_SAMPLE_RAW;
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/* Turn off inheritance */
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a->inherit = 0;
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}
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static_branch_inc(&pai_key);
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out:
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return rc;
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}
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static void paicrypt_read(struct perf_event *event)
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{
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u64 prev, new, delta;
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prev = local64_read(&event->hw.prev_count);
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new = paicrypt_getall(event);
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local64_set(&event->hw.prev_count, new);
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delta = (prev <= new) ? new - prev
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: (-1ULL - prev) + new + 1; /* overflow */
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local64_add(delta, &event->count);
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}
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static void paicrypt_start(struct perf_event *event, int flags)
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{
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struct paicrypt_mapptr *mp = this_cpu_ptr(paicrypt_root.mapptr);
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struct paicrypt_map *cpump = mp->mapptr;
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u64 sum;
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if (!event->attr.sample_period) { /* Counting */
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sum = paicrypt_getall(event); /* Get current value */
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local64_set(&event->hw.prev_count, sum);
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} else { /* Sampling */
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memcpy((void *)PAI_SAVE_AREA(event), cpump->page, PAGE_SIZE);
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/* Enable context switch callback for system-wide sampling */
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if (!(event->attach_state & PERF_ATTACH_TASK)) {
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list_add_tail(PAI_SWLIST(event), &cpump->syswide_list);
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perf_sched_cb_inc(event->pmu);
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} else {
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cpump->event = event;
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}
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}
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}
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static int paicrypt_add(struct perf_event *event, int flags)
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{
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struct paicrypt_mapptr *mp = this_cpu_ptr(paicrypt_root.mapptr);
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struct paicrypt_map *cpump = mp->mapptr;
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unsigned long ccd;
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if (++cpump->active_events == 1) {
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ccd = virt_to_phys(cpump->page) | PAI_CRYPTO_KERNEL_OFFSET;
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WRITE_ONCE(get_lowcore()->ccd, ccd);
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local_ctl_set_bit(0, CR0_CRYPTOGRAPHY_COUNTER_BIT);
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}
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if (flags & PERF_EF_START)
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paicrypt_start(event, PERF_EF_RELOAD);
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event->hw.state = 0;
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return 0;
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}
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static void paicrypt_have_sample(struct perf_event *, struct paicrypt_map *);
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static void paicrypt_stop(struct perf_event *event, int flags)
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{
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struct paicrypt_mapptr *mp = this_cpu_ptr(paicrypt_root.mapptr);
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struct paicrypt_map *cpump = mp->mapptr;
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if (!event->attr.sample_period) { /* Counting */
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paicrypt_read(event);
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} else { /* Sampling */
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if (!(event->attach_state & PERF_ATTACH_TASK)) {
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perf_sched_cb_dec(event->pmu);
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list_del(PAI_SWLIST(event));
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} else {
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paicrypt_have_sample(event, cpump);
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cpump->event = NULL;
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}
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}
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event->hw.state = PERF_HES_STOPPED;
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}
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static void paicrypt_del(struct perf_event *event, int flags)
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{
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struct paicrypt_mapptr *mp = this_cpu_ptr(paicrypt_root.mapptr);
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struct paicrypt_map *cpump = mp->mapptr;
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paicrypt_stop(event, PERF_EF_UPDATE);
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if (--cpump->active_events == 0) {
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local_ctl_clear_bit(0, CR0_CRYPTOGRAPHY_COUNTER_BIT);
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WRITE_ONCE(get_lowcore()->ccd, 0);
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}
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}
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/* Create raw data and save it in buffer. Calculate the delta for each
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* counter between this invocation and the last invocation.
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* Returns number of bytes copied.
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* Saves only entries with positive counter difference of the form
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* 2 bytes: Number of counter
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* 8 bytes: Value of counter
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*/
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static size_t paicrypt_copy(struct pai_userdata *userdata, unsigned long *page,
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unsigned long *page_old, bool exclude_user,
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bool exclude_kernel)
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{
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int i, outidx = 0;
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for (i = 1; i <= paicrypt_cnt; i++) {
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u64 val = 0, val_old = 0;
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if (!exclude_kernel) {
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val += paicrypt_getctr(page, i, true);
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val_old += paicrypt_getctr(page_old, i, true);
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}
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if (!exclude_user) {
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val += paicrypt_getctr(page, i, false);
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val_old += paicrypt_getctr(page_old, i, false);
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}
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if (val >= val_old)
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val -= val_old;
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else
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val = (~0ULL - val_old) + val + 1;
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if (val) {
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userdata[outidx].num = i;
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userdata[outidx].value = val;
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outidx++;
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}
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}
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return outidx * sizeof(struct pai_userdata);
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}
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static int paicrypt_push_sample(size_t rawsize, struct paicrypt_map *cpump,
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struct perf_event *event)
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{
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struct perf_sample_data data;
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struct perf_raw_record raw;
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struct pt_regs regs;
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int overflow;
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/* Setup perf sample */
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memset(®s, 0, sizeof(regs));
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memset(&raw, 0, sizeof(raw));
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memset(&data, 0, sizeof(data));
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perf_sample_data_init(&data, 0, event->hw.last_period);
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if (event->attr.sample_type & PERF_SAMPLE_TID) {
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data.tid_entry.pid = task_tgid_nr(current);
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data.tid_entry.tid = task_pid_nr(current);
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}
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if (event->attr.sample_type & PERF_SAMPLE_TIME)
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data.time = event->clock();
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if (event->attr.sample_type & (PERF_SAMPLE_ID | PERF_SAMPLE_IDENTIFIER))
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data.id = event->id;
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if (event->attr.sample_type & PERF_SAMPLE_CPU) {
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data.cpu_entry.cpu = smp_processor_id();
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data.cpu_entry.reserved = 0;
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}
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if (event->attr.sample_type & PERF_SAMPLE_RAW) {
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raw.frag.size = rawsize;
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raw.frag.data = cpump->save;
|
|
perf_sample_save_raw_data(&data, event, &raw);
|
|
}
|
|
|
|
overflow = perf_event_overflow(event, &data, ®s);
|
|
perf_event_update_userpage(event);
|
|
/* Save crypto counter lowcore page after reading event data. */
|
|
memcpy((void *)PAI_SAVE_AREA(event), cpump->page, PAGE_SIZE);
|
|
return overflow;
|
|
}
|
|
|
|
/* Check if there is data to be saved on schedule out of a task. */
|
|
static void paicrypt_have_sample(struct perf_event *event,
|
|
struct paicrypt_map *cpump)
|
|
{
|
|
size_t rawsize;
|
|
|
|
if (!event) /* No event active */
|
|
return;
|
|
rawsize = paicrypt_copy(cpump->save, cpump->page,
|
|
(unsigned long *)PAI_SAVE_AREA(event),
|
|
event->attr.exclude_user,
|
|
event->attr.exclude_kernel);
|
|
if (rawsize) /* No incremented counters */
|
|
paicrypt_push_sample(rawsize, cpump, event);
|
|
}
|
|
|
|
/* Check if there is data to be saved on schedule out of a task. */
|
|
static void paicrypt_have_samples(void)
|
|
{
|
|
struct paicrypt_mapptr *mp = this_cpu_ptr(paicrypt_root.mapptr);
|
|
struct paicrypt_map *cpump = mp->mapptr;
|
|
struct perf_event *event;
|
|
|
|
list_for_each_entry(event, &cpump->syswide_list, hw.tp_list)
|
|
paicrypt_have_sample(event, cpump);
|
|
}
|
|
|
|
/* Called on schedule-in and schedule-out. No access to event structure,
|
|
* but for sampling only event CRYPTO_ALL is allowed.
|
|
*/
|
|
static void paicrypt_sched_task(struct perf_event_pmu_context *pmu_ctx,
|
|
struct task_struct *task, bool sched_in)
|
|
{
|
|
/* We started with a clean page on event installation. So read out
|
|
* results on schedule_out and if page was dirty, save old values.
|
|
*/
|
|
if (!sched_in)
|
|
paicrypt_have_samples();
|
|
}
|
|
|
|
/* Attribute definitions for paicrypt interface. As with other CPU
|
|
* Measurement Facilities, there is one attribute per mapped counter.
|
|
* The number of mapped counters may vary per machine generation. Use
|
|
* the QUERY PROCESSOR ACTIVITY COUNTER INFORMATION (QPACI) instruction
|
|
* to determine the number of mapped counters. The instructions returns
|
|
* a positive number, which is the highest number of supported counters.
|
|
* All counters less than this number are also supported, there are no
|
|
* holes. A returned number of zero means no support for mapped counters.
|
|
*
|
|
* The identification of the counter is a unique number. The chosen range
|
|
* is 0x1000 + offset in mapped kernel page.
|
|
* All CPU Measurement Facility counters identifiers must be unique and
|
|
* the numbers from 0 to 496 are already used for the CPU Measurement
|
|
* Counter facility. Numbers 0xb0000, 0xbc000 and 0xbd000 are already
|
|
* used for the CPU Measurement Sampling facility.
|
|
*/
|
|
PMU_FORMAT_ATTR(event, "config:0-63");
|
|
|
|
static struct attribute *paicrypt_format_attr[] = {
|
|
&format_attr_event.attr,
|
|
NULL,
|
|
};
|
|
|
|
static struct attribute_group paicrypt_events_group = {
|
|
.name = "events",
|
|
.attrs = NULL /* Filled in attr_event_init() */
|
|
};
|
|
|
|
static struct attribute_group paicrypt_format_group = {
|
|
.name = "format",
|
|
.attrs = paicrypt_format_attr,
|
|
};
|
|
|
|
static const struct attribute_group *paicrypt_attr_groups[] = {
|
|
&paicrypt_events_group,
|
|
&paicrypt_format_group,
|
|
NULL,
|
|
};
|
|
|
|
/* Performance monitoring unit for mapped counters */
|
|
static struct pmu paicrypt = {
|
|
.task_ctx_nr = perf_hw_context,
|
|
.event_init = paicrypt_event_init,
|
|
.add = paicrypt_add,
|
|
.del = paicrypt_del,
|
|
.start = paicrypt_start,
|
|
.stop = paicrypt_stop,
|
|
.read = paicrypt_read,
|
|
.sched_task = paicrypt_sched_task,
|
|
.attr_groups = paicrypt_attr_groups
|
|
};
|
|
|
|
/* List of symbolic PAI counter names. */
|
|
static const char * const paicrypt_ctrnames[] = {
|
|
[0] = "CRYPTO_ALL",
|
|
[1] = "KM_DEA",
|
|
[2] = "KM_TDEA_128",
|
|
[3] = "KM_TDEA_192",
|
|
[4] = "KM_ENCRYPTED_DEA",
|
|
[5] = "KM_ENCRYPTED_TDEA_128",
|
|
[6] = "KM_ENCRYPTED_TDEA_192",
|
|
[7] = "KM_AES_128",
|
|
[8] = "KM_AES_192",
|
|
[9] = "KM_AES_256",
|
|
[10] = "KM_ENCRYPTED_AES_128",
|
|
[11] = "KM_ENCRYPTED_AES_192",
|
|
[12] = "KM_ENCRYPTED_AES_256",
|
|
[13] = "KM_XTS_AES_128",
|
|
[14] = "KM_XTS_AES_256",
|
|
[15] = "KM_XTS_ENCRYPTED_AES_128",
|
|
[16] = "KM_XTS_ENCRYPTED_AES_256",
|
|
[17] = "KMC_DEA",
|
|
[18] = "KMC_TDEA_128",
|
|
[19] = "KMC_TDEA_192",
|
|
[20] = "KMC_ENCRYPTED_DEA",
|
|
[21] = "KMC_ENCRYPTED_TDEA_128",
|
|
[22] = "KMC_ENCRYPTED_TDEA_192",
|
|
[23] = "KMC_AES_128",
|
|
[24] = "KMC_AES_192",
|
|
[25] = "KMC_AES_256",
|
|
[26] = "KMC_ENCRYPTED_AES_128",
|
|
[27] = "KMC_ENCRYPTED_AES_192",
|
|
[28] = "KMC_ENCRYPTED_AES_256",
|
|
[29] = "KMC_PRNG",
|
|
[30] = "KMA_GCM_AES_128",
|
|
[31] = "KMA_GCM_AES_192",
|
|
[32] = "KMA_GCM_AES_256",
|
|
[33] = "KMA_GCM_ENCRYPTED_AES_128",
|
|
[34] = "KMA_GCM_ENCRYPTED_AES_192",
|
|
[35] = "KMA_GCM_ENCRYPTED_AES_256",
|
|
[36] = "KMF_DEA",
|
|
[37] = "KMF_TDEA_128",
|
|
[38] = "KMF_TDEA_192",
|
|
[39] = "KMF_ENCRYPTED_DEA",
|
|
[40] = "KMF_ENCRYPTED_TDEA_128",
|
|
[41] = "KMF_ENCRYPTED_TDEA_192",
|
|
[42] = "KMF_AES_128",
|
|
[43] = "KMF_AES_192",
|
|
[44] = "KMF_AES_256",
|
|
[45] = "KMF_ENCRYPTED_AES_128",
|
|
[46] = "KMF_ENCRYPTED_AES_192",
|
|
[47] = "KMF_ENCRYPTED_AES_256",
|
|
[48] = "KMCTR_DEA",
|
|
[49] = "KMCTR_TDEA_128",
|
|
[50] = "KMCTR_TDEA_192",
|
|
[51] = "KMCTR_ENCRYPTED_DEA",
|
|
[52] = "KMCTR_ENCRYPTED_TDEA_128",
|
|
[53] = "KMCTR_ENCRYPTED_TDEA_192",
|
|
[54] = "KMCTR_AES_128",
|
|
[55] = "KMCTR_AES_192",
|
|
[56] = "KMCTR_AES_256",
|
|
[57] = "KMCTR_ENCRYPTED_AES_128",
|
|
[58] = "KMCTR_ENCRYPTED_AES_192",
|
|
[59] = "KMCTR_ENCRYPTED_AES_256",
|
|
[60] = "KMO_DEA",
|
|
[61] = "KMO_TDEA_128",
|
|
[62] = "KMO_TDEA_192",
|
|
[63] = "KMO_ENCRYPTED_DEA",
|
|
[64] = "KMO_ENCRYPTED_TDEA_128",
|
|
[65] = "KMO_ENCRYPTED_TDEA_192",
|
|
[66] = "KMO_AES_128",
|
|
[67] = "KMO_AES_192",
|
|
[68] = "KMO_AES_256",
|
|
[69] = "KMO_ENCRYPTED_AES_128",
|
|
[70] = "KMO_ENCRYPTED_AES_192",
|
|
[71] = "KMO_ENCRYPTED_AES_256",
|
|
[72] = "KIMD_SHA_1",
|
|
[73] = "KIMD_SHA_256",
|
|
[74] = "KIMD_SHA_512",
|
|
[75] = "KIMD_SHA3_224",
|
|
[76] = "KIMD_SHA3_256",
|
|
[77] = "KIMD_SHA3_384",
|
|
[78] = "KIMD_SHA3_512",
|
|
[79] = "KIMD_SHAKE_128",
|
|
[80] = "KIMD_SHAKE_256",
|
|
[81] = "KIMD_GHASH",
|
|
[82] = "KLMD_SHA_1",
|
|
[83] = "KLMD_SHA_256",
|
|
[84] = "KLMD_SHA_512",
|
|
[85] = "KLMD_SHA3_224",
|
|
[86] = "KLMD_SHA3_256",
|
|
[87] = "KLMD_SHA3_384",
|
|
[88] = "KLMD_SHA3_512",
|
|
[89] = "KLMD_SHAKE_128",
|
|
[90] = "KLMD_SHAKE_256",
|
|
[91] = "KMAC_DEA",
|
|
[92] = "KMAC_TDEA_128",
|
|
[93] = "KMAC_TDEA_192",
|
|
[94] = "KMAC_ENCRYPTED_DEA",
|
|
[95] = "KMAC_ENCRYPTED_TDEA_128",
|
|
[96] = "KMAC_ENCRYPTED_TDEA_192",
|
|
[97] = "KMAC_AES_128",
|
|
[98] = "KMAC_AES_192",
|
|
[99] = "KMAC_AES_256",
|
|
[100] = "KMAC_ENCRYPTED_AES_128",
|
|
[101] = "KMAC_ENCRYPTED_AES_192",
|
|
[102] = "KMAC_ENCRYPTED_AES_256",
|
|
[103] = "PCC_COMPUTE_LAST_BLOCK_CMAC_USING_DEA",
|
|
[104] = "PCC_COMPUTE_LAST_BLOCK_CMAC_USING_TDEA_128",
|
|
[105] = "PCC_COMPUTE_LAST_BLOCK_CMAC_USING_TDEA_192",
|
|
[106] = "PCC_COMPUTE_LAST_BLOCK_CMAC_USING_ENCRYPTED_DEA",
|
|
[107] = "PCC_COMPUTE_LAST_BLOCK_CMAC_USING_ENCRYPTED_TDEA_128",
|
|
[108] = "PCC_COMPUTE_LAST_BLOCK_CMAC_USING_ENCRYPTED_TDEA_192",
|
|
[109] = "PCC_COMPUTE_LAST_BLOCK_CMAC_USING_AES_128",
|
|
[110] = "PCC_COMPUTE_LAST_BLOCK_CMAC_USING_AES_192",
|
|
[111] = "PCC_COMPUTE_LAST_BLOCK_CMAC_USING_AES_256",
|
|
[112] = "PCC_COMPUTE_LAST_BLOCK_CMAC_USING_ENCRYPTED_AES_128",
|
|
[113] = "PCC_COMPUTE_LAST_BLOCK_CMAC_USING_ENCRYPTED_AES_192",
|
|
[114] = "PCC_COMPUTE_LAST_BLOCK_CMAC_USING_ENCRYPTED_AES_256A",
|
|
[115] = "PCC_COMPUTE_XTS_PARAMETER_USING_AES_128",
|
|
[116] = "PCC_COMPUTE_XTS_PARAMETER_USING_AES_256",
|
|
[117] = "PCC_COMPUTE_XTS_PARAMETER_USING_ENCRYPTED_AES_128",
|
|
[118] = "PCC_COMPUTE_XTS_PARAMETER_USING_ENCRYPTED_AES_256",
|
|
[119] = "PCC_SCALAR_MULTIPLY_P256",
|
|
[120] = "PCC_SCALAR_MULTIPLY_P384",
|
|
[121] = "PCC_SCALAR_MULTIPLY_P521",
|
|
[122] = "PCC_SCALAR_MULTIPLY_ED25519",
|
|
[123] = "PCC_SCALAR_MULTIPLY_ED448",
|
|
[124] = "PCC_SCALAR_MULTIPLY_X25519",
|
|
[125] = "PCC_SCALAR_MULTIPLY_X448",
|
|
[126] = "PRNO_SHA_512_DRNG",
|
|
[127] = "PRNO_TRNG_QUERY_RAW_TO_CONDITIONED_RATIO",
|
|
[128] = "PRNO_TRNG",
|
|
[129] = "KDSA_ECDSA_VERIFY_P256",
|
|
[130] = "KDSA_ECDSA_VERIFY_P384",
|
|
[131] = "KDSA_ECDSA_VERIFY_P521",
|
|
[132] = "KDSA_ECDSA_SIGN_P256",
|
|
[133] = "KDSA_ECDSA_SIGN_P384",
|
|
[134] = "KDSA_ECDSA_SIGN_P521",
|
|
[135] = "KDSA_ENCRYPTED_ECDSA_SIGN_P256",
|
|
[136] = "KDSA_ENCRYPTED_ECDSA_SIGN_P384",
|
|
[137] = "KDSA_ENCRYPTED_ECDSA_SIGN_P521",
|
|
[138] = "KDSA_EDDSA_VERIFY_ED25519",
|
|
[139] = "KDSA_EDDSA_VERIFY_ED448",
|
|
[140] = "KDSA_EDDSA_SIGN_ED25519",
|
|
[141] = "KDSA_EDDSA_SIGN_ED448",
|
|
[142] = "KDSA_ENCRYPTED_EDDSA_SIGN_ED25519",
|
|
[143] = "KDSA_ENCRYPTED_EDDSA_SIGN_ED448",
|
|
[144] = "PCKMO_ENCRYPT_DEA_KEY",
|
|
[145] = "PCKMO_ENCRYPT_TDEA_128_KEY",
|
|
[146] = "PCKMO_ENCRYPT_TDEA_192_KEY",
|
|
[147] = "PCKMO_ENCRYPT_AES_128_KEY",
|
|
[148] = "PCKMO_ENCRYPT_AES_192_KEY",
|
|
[149] = "PCKMO_ENCRYPT_AES_256_KEY",
|
|
[150] = "PCKMO_ENCRYPT_ECC_P256_KEY",
|
|
[151] = "PCKMO_ENCRYPT_ECC_P384_KEY",
|
|
[152] = "PCKMO_ENCRYPT_ECC_P521_KEY",
|
|
[153] = "PCKMO_ENCRYPT_ECC_ED25519_KEY",
|
|
[154] = "PCKMO_ENCRYPT_ECC_ED448_KEY",
|
|
[155] = "IBM_RESERVED_155",
|
|
[156] = "IBM_RESERVED_156",
|
|
[157] = "KM_FULL_XTS_AES_128",
|
|
[158] = "KM_FULL_XTS_AES_256",
|
|
[159] = "KM_FULL_XTS_ENCRYPTED_AES_128",
|
|
[160] = "KM_FULL_XTS_ENCRYPTED_AES_256",
|
|
[161] = "KMAC_HMAC_SHA_224",
|
|
[162] = "KMAC_HMAC_SHA_256",
|
|
[163] = "KMAC_HMAC_SHA_384",
|
|
[164] = "KMAC_HMAC_SHA_512",
|
|
[165] = "KMAC_HMAC_ENCRYPTED_SHA_224",
|
|
[166] = "KMAC_HMAC_ENCRYPTED_SHA_256",
|
|
[167] = "KMAC_HMAC_ENCRYPTED_SHA_384",
|
|
[168] = "KMAC_HMAC_ENCRYPTED_SHA_512",
|
|
[169] = "PCKMO_ENCRYPT_HMAC_512_KEY",
|
|
[170] = "PCKMO_ENCRYPT_HMAC_1024_KEY",
|
|
[171] = "PCKMO_ENCRYPT_AES_XTS_128",
|
|
[172] = "PCKMO_ENCRYPT_AES_XTS_256",
|
|
};
|
|
|
|
static void __init attr_event_free(struct attribute **attrs, int num)
|
|
{
|
|
struct perf_pmu_events_attr *pa;
|
|
int i;
|
|
|
|
for (i = 0; i < num; i++) {
|
|
struct device_attribute *dap;
|
|
|
|
dap = container_of(attrs[i], struct device_attribute, attr);
|
|
pa = container_of(dap, struct perf_pmu_events_attr, attr);
|
|
kfree(pa);
|
|
}
|
|
kfree(attrs);
|
|
}
|
|
|
|
static int __init attr_event_init_one(struct attribute **attrs, int num)
|
|
{
|
|
struct perf_pmu_events_attr *pa;
|
|
|
|
/* Index larger than array_size, no counter name available */
|
|
if (num >= ARRAY_SIZE(paicrypt_ctrnames)) {
|
|
attrs[num] = NULL;
|
|
return 0;
|
|
}
|
|
|
|
pa = kzalloc(sizeof(*pa), GFP_KERNEL);
|
|
if (!pa)
|
|
return -ENOMEM;
|
|
|
|
sysfs_attr_init(&pa->attr.attr);
|
|
pa->id = PAI_CRYPTO_BASE + num;
|
|
pa->attr.attr.name = paicrypt_ctrnames[num];
|
|
pa->attr.attr.mode = 0444;
|
|
pa->attr.show = cpumf_events_sysfs_show;
|
|
pa->attr.store = NULL;
|
|
attrs[num] = &pa->attr.attr;
|
|
return 0;
|
|
}
|
|
|
|
/* Create PMU sysfs event attributes on the fly. */
|
|
static int __init attr_event_init(void)
|
|
{
|
|
struct attribute **attrs;
|
|
int ret, i;
|
|
|
|
attrs = kmalloc_array(paicrypt_cnt + 2, sizeof(*attrs), GFP_KERNEL);
|
|
if (!attrs)
|
|
return -ENOMEM;
|
|
for (i = 0; i <= paicrypt_cnt; i++) {
|
|
ret = attr_event_init_one(attrs, i);
|
|
if (ret) {
|
|
attr_event_free(attrs, i);
|
|
return ret;
|
|
}
|
|
}
|
|
attrs[i] = NULL;
|
|
paicrypt_events_group.attrs = attrs;
|
|
return 0;
|
|
}
|
|
|
|
static int __init paicrypt_init(void)
|
|
{
|
|
struct qpaci_info_block ib;
|
|
int rc;
|
|
|
|
if (!test_facility(196))
|
|
return 0;
|
|
|
|
qpaci(&ib);
|
|
paicrypt_cnt = ib.num_cc;
|
|
if (paicrypt_cnt == 0)
|
|
return 0;
|
|
if (paicrypt_cnt >= PAI_CRYPTO_MAXCTR) {
|
|
pr_err("Too many PMU pai_crypto counters %d\n", paicrypt_cnt);
|
|
return -E2BIG;
|
|
}
|
|
|
|
rc = attr_event_init(); /* Export known PAI crypto events */
|
|
if (rc) {
|
|
pr_err("Creation of PMU pai_crypto /sysfs failed\n");
|
|
return rc;
|
|
}
|
|
|
|
/* Setup s390dbf facility */
|
|
cfm_dbg = debug_register(KMSG_COMPONENT, 2, 256, 128);
|
|
if (!cfm_dbg) {
|
|
pr_err("Registration of s390dbf pai_crypto failed\n");
|
|
return -ENOMEM;
|
|
}
|
|
debug_register_view(cfm_dbg, &debug_sprintf_view);
|
|
|
|
rc = perf_pmu_register(&paicrypt, "pai_crypto", -1);
|
|
if (rc) {
|
|
pr_err("Registering the pai_crypto PMU failed with rc=%i\n",
|
|
rc);
|
|
debug_unregister_view(cfm_dbg, &debug_sprintf_view);
|
|
debug_unregister(cfm_dbg);
|
|
return rc;
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
device_initcall(paicrypt_init);
|