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git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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ca4477e41c
Instead of providing crypto_shash algorithms for the arch-optimized SHA-256 code, instead implement the SHA-256 library. This is much simpler, it makes the SHA-256 library functions be arch-optimized, and it fixes the longstanding issue where the arch-optimized SHA-256 was disabled by default. SHA-256 still remains available through crypto_shash, but individual architectures no longer need to handle it. To merge the scalar, NEON, and CE code all into one module cleanly, add !CPU_V7M as a direct dependency of the CE code. Previously, !CPU_V7M was only a direct dependency of the scalar and NEON code. The result is still the same because CPU_V7M implies !KERNEL_MODE_NEON, so !CPU_V7M was already an indirect dependency of the CE code. To match sha256_blocks_arch(), change the type of the nblocks parameter of the assembly functions from int to size_t. The assembly functions actually already treated it as size_t. While renaming the assembly files, also fix the naming quirk where "sha2" meant sha256. (SHA-512 is also part of SHA-2.) Reviewed-by: Ard Biesheuvel <ardb@kernel.org> Signed-off-by: Eric Biggers <ebiggers@google.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
172 lines
5.3 KiB
Plaintext
172 lines
5.3 KiB
Plaintext
# SPDX-License-Identifier: GPL-2.0
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menu "Accelerated Cryptographic Algorithms for CPU (arm)"
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config CRYPTO_CURVE25519_NEON
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tristate
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depends on KERNEL_MODE_NEON
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select CRYPTO_KPP
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select CRYPTO_LIB_CURVE25519_GENERIC
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select CRYPTO_ARCH_HAVE_LIB_CURVE25519
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default CRYPTO_LIB_CURVE25519_INTERNAL
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help
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Curve25519 algorithm
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Architecture: arm with
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- NEON (Advanced SIMD) extensions
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config CRYPTO_GHASH_ARM_CE
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tristate "Hash functions: GHASH (PMULL/NEON/ARMv8 Crypto Extensions)"
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depends on KERNEL_MODE_NEON
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select CRYPTO_AEAD
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select CRYPTO_HASH
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select CRYPTO_CRYPTD
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select CRYPTO_LIB_AES
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select CRYPTO_LIB_GF128MUL
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help
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GCM GHASH function (NIST SP800-38D)
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Architecture: arm using
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- PMULL (Polynomial Multiply Long) instructions
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- NEON (Advanced SIMD) extensions
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- ARMv8 Crypto Extensions
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Use an implementation of GHASH (used by the GCM AEAD chaining mode)
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that uses the 64x64 to 128 bit polynomial multiplication (vmull.p64)
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that is part of the ARMv8 Crypto Extensions, or a slower variant that
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uses the vmull.p8 instruction that is part of the basic NEON ISA.
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config CRYPTO_NHPOLY1305_NEON
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tristate "Hash functions: NHPoly1305 (NEON)"
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depends on KERNEL_MODE_NEON
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select CRYPTO_NHPOLY1305
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help
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NHPoly1305 hash function (Adiantum)
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Architecture: arm using:
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- NEON (Advanced SIMD) extensions
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config CRYPTO_BLAKE2B_NEON
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tristate "Hash functions: BLAKE2b (NEON)"
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depends on KERNEL_MODE_NEON
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select CRYPTO_BLAKE2B
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help
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BLAKE2b cryptographic hash function (RFC 7693)
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Architecture: arm using
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- NEON (Advanced SIMD) extensions
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BLAKE2b digest algorithm optimized with ARM NEON instructions.
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On ARM processors that have NEON support but not the ARMv8
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Crypto Extensions, typically this BLAKE2b implementation is
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much faster than the SHA-2 family and slightly faster than
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SHA-1.
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config CRYPTO_SHA1_ARM
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tristate "Hash functions: SHA-1"
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select CRYPTO_SHA1
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select CRYPTO_HASH
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help
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SHA-1 secure hash algorithm (FIPS 180)
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Architecture: arm
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config CRYPTO_SHA1_ARM_NEON
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tristate "Hash functions: SHA-1 (NEON)"
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depends on KERNEL_MODE_NEON
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select CRYPTO_SHA1_ARM
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select CRYPTO_SHA1
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select CRYPTO_HASH
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help
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SHA-1 secure hash algorithm (FIPS 180)
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Architecture: arm using
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- NEON (Advanced SIMD) extensions
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config CRYPTO_SHA1_ARM_CE
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tristate "Hash functions: SHA-1 (ARMv8 Crypto Extensions)"
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depends on KERNEL_MODE_NEON
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select CRYPTO_SHA1_ARM
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select CRYPTO_HASH
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help
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SHA-1 secure hash algorithm (FIPS 180)
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Architecture: arm using ARMv8 Crypto Extensions
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config CRYPTO_SHA512_ARM
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tristate "Hash functions: SHA-384 and SHA-512 (NEON)"
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select CRYPTO_HASH
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depends on !CPU_V7M
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help
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SHA-384 and SHA-512 secure hash algorithms (FIPS 180)
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Architecture: arm using
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- NEON (Advanced SIMD) extensions
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config CRYPTO_AES_ARM
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tristate "Ciphers: AES"
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select CRYPTO_ALGAPI
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select CRYPTO_AES
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help
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Block ciphers: AES cipher algorithms (FIPS-197)
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Architecture: arm
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On ARM processors without the Crypto Extensions, this is the
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fastest AES implementation for single blocks. For multiple
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blocks, the NEON bit-sliced implementation is usually faster.
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This implementation may be vulnerable to cache timing attacks,
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since it uses lookup tables. However, as countermeasures it
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disables IRQs and preloads the tables; it is hoped this makes
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such attacks very difficult.
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config CRYPTO_AES_ARM_BS
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tristate "Ciphers: AES, modes: ECB/CBC/CTR/XTS (bit-sliced NEON)"
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depends on KERNEL_MODE_NEON
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select CRYPTO_AES_ARM
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select CRYPTO_SKCIPHER
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select CRYPTO_LIB_AES
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help
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Length-preserving ciphers: AES cipher algorithms (FIPS-197)
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with block cipher modes:
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- ECB (Electronic Codebook) mode (NIST SP800-38A)
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- CBC (Cipher Block Chaining) mode (NIST SP800-38A)
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- CTR (Counter) mode (NIST SP800-38A)
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- XTS (XOR Encrypt XOR with ciphertext stealing) mode (NIST SP800-38E
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and IEEE 1619)
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Bit sliced AES gives around 45% speedup on Cortex-A15 for CTR mode
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and for XTS mode encryption, CBC and XTS mode decryption speedup is
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around 25%. (CBC encryption speed is not affected by this driver.)
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The bit sliced AES code does not use lookup tables, so it is believed
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to be invulnerable to cache timing attacks. However, since the bit
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sliced AES code cannot process single blocks efficiently, in certain
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cases table-based code with some countermeasures against cache timing
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attacks will still be used as a fallback method; specifically CBC
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encryption (not CBC decryption), the encryption of XTS tweaks, XTS
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ciphertext stealing when the message isn't a multiple of 16 bytes, and
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CTR when invoked in a context in which NEON instructions are unusable.
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config CRYPTO_AES_ARM_CE
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tristate "Ciphers: AES, modes: ECB/CBC/CTS/CTR/XTS (ARMv8 Crypto Extensions)"
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depends on KERNEL_MODE_NEON
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select CRYPTO_SKCIPHER
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select CRYPTO_LIB_AES
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help
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Length-preserving ciphers: AES cipher algorithms (FIPS-197)
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with block cipher modes:
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- ECB (Electronic Codebook) mode (NIST SP800-38A)
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- CBC (Cipher Block Chaining) mode (NIST SP800-38A)
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- CTR (Counter) mode (NIST SP800-38A)
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- CTS (Cipher Text Stealing) mode (NIST SP800-38A)
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- XTS (XOR Encrypt XOR with ciphertext stealing) mode (NIST SP800-38E
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and IEEE 1619)
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Architecture: arm using:
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- ARMv8 Crypto Extensions
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endmenu
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