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The relevant datasheet [1] specifies nonstandard limits for the bit timing
parameters. While it is unclear what the exact effect of violating these
limits is, it seems like a good idea to adhere to the documentation.
[1] Intel Atom® x6000E Series, and Intel® Pentium® and Celeron® N and J
Series Processors for IoT Applications Datasheet,
Volume 2 (Book 3 of 3), July 2021, Revision 001
Fixes:
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| .. | ||
| Kconfig | ||
| m_can_pci.c | ||
| m_can_platform.c | ||
| m_can.c | ||
| m_can.h | ||
| Makefile | ||
| tcan4x5x-core.c | ||
| tcan4x5x-regmap.c | ||
| tcan4x5x.h | ||