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linux/arch/riscv/kernel
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Linus Torvalds b89f311d7e RISC-V Patches for the 5.16 Merge Window, Part 1 
* Support for time namespaces in the VDSO, along with some associated
   cleanups.
 * Support for building rv32 randconfigs.
 * Improvements to the XIP port that allow larger kernels to function
 * Various device tree cleanups for both the SiFive and Microchip boards
 * A handful of defconfig updates, including enabling Nouveau.
 
 There are also various small cleanups.
 -----BEGIN PGP SIGNATURE-----
 
 iQJHBAABCAAxFiEEKzw3R0RoQ7JKlDp6LhMZ81+7GIkFAmGN9T4THHBhbG1lckBk
 YWJiZWx0LmNvbQAKCRAuExnzX7sYiQEBD/9EvGe5jPb8binNiLN81ExYh3HGBJ9A
 sY+/rhVWnTUX/igBU4M9gNHu5Rts2ITlsBda9YnYRgMunAS1cnZJ/jbvckfsFA+s
 svehPgDZSR+BqBnVDN1hEsY+TrNbFFFZIApGDbImuC5+81np/p3u1zkl3hhO0amJ
 7T46qxRq4iazbuohi47/ba6ufXyLb8XBg3LTUfp+lTnH7/VLbwspPWdzNgiJpMzB
 qEWfYd4au2zfqHC6SYHXidy/tkquhJ6DgKq0G3+XUCugeennMeisDWI9GsxTAzIa
 Pynm9GHA/AuK1/kt9qB/Czsg7bqY8RUreUMLNZEyHzwKA1OWQVxlfCdl5zIpxlkq
 eJkxjbhhPuneVRGUSJgKQqBEUtGlH9yISqO2CFFdKRqzm1ImJtkAJGC+SubpKSbU
 D+ZAGbAyEwDUfl1yyKzKRg6YnzntMxh8sfNdJRYMrOhczk8L//R8yxG6SX6bjw7W
 lTQk7wkpo2yS7L799dukKdlllYbUvqavZwsIHTyb1TsRoavQeqoJq/6jKXJNhFHD
 rA/OQgCUXuHTmpgdDUhHuLZVvJqT5n8Vxigi30nIq24KOgTom8tRRtiAWOJv7G+Z
 b/Y3eq0VE8yjhPSbtsAxooZnpEVgXsVqx3t/lBt0MiJE1a3JLSSchRTHBjWllCiV
 +yvCerCh8PoT8w==
 =Mpen
 -----END PGP SIGNATURE-----

Merge tag 'riscv-for-linus-5.16-mw1' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux

Pull RISC-V updates from Palmer Dabbelt:

 - Support for time namespaces in the VDSO, along with some associated
   cleanups.

 - Support for building rv32 randconfigs.

 - Improvements to the XIP port that allow larger kernels to function

 - Various device tree cleanups for both the SiFive and Microchip boards

 - A handful of defconfig updates, including enabling Nouveau.

There are also various small cleanups.

* tag 'riscv-for-linus-5.16-mw1' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux:
  riscv: defconfig: enable DRM_NOUVEAU
  riscv/vdso: Drop unneeded part due to merge issue
  riscv: remove .text section size limitation for XIP
  riscv: dts: sifive: add missing compatible for plic
  riscv: dts: microchip: add missing compatibles for clint and plic
  riscv: dts: sifive: drop duplicated nodes and properties in sifive
  riscv: dts: sifive: fix Unleashed board compatible
  riscv: dts: sifive: use only generic JEDEC SPI NOR flash compatible
  riscv: dts: microchip: use vendor compatible for Cadence SD4HC
  riscv: dts: microchip: drop unused pinctrl-names
  riscv: dts: microchip: drop duplicated MMC/SDHC node
  riscv: dts: microchip: fix board compatible
  riscv: dts: microchip: drop duplicated nodes
  dt-bindings: mmc: cdns: document Microchip MPFS MMC/SDHCI controller
  riscv: add rv32 and rv64 randconfig build targets
  riscv: mm: don't advertise 1 num_asid for 0 asid bits
  riscv: set default pm_power_off to NULL
  riscv/vdso: Add support for time namespaces
2021-11-13 09:15:42 -08:00
..
probes ftrace: disable preemption when recursion locked 2021-10-27 11:21:49 -04:00
vdso riscv/vdso: Add support for time namespaces 2021-10-04 14:16:43 -07:00
.gitignore .gitignore: add SPDX License Identifier 2020-03-25 11:50:48 +01:00
asm-offsets.c ARM: 2021-11-02 11:24:14 -07:00
cacheinfo.c drivers: base: cacheinfo: Get rid of DEFINE_SMP_CALL_CACHE_FUNCTION() 2021-09-01 10:29:10 +02:00
cpu_ops_sbi.c RISC-V: Support cpu hotplug 2020-03-31 11:28:30 -07:00
cpu_ops_spinwait.c RISC-V: Add cpu_ops and modify default booting method 2020-03-31 11:25:56 -07:00
cpu_ops.c treewide: Convert macro and uses of __section(foo) to __section("foo") 2020-10-25 14:51:49 -07:00
cpu-hotplug.c RISC-V: Support cpu hotplug 2020-03-31 11:28:30 -07:00
cpu.c riscv: Use of_get_cpu_hwid() 2021-10-20 13:37:24 -05:00
cpufeature.c riscv: Add __init section marker to some functions again 2021-05-29 13:39:27 -07:00
crash_dump.c RISC-V: Add crash kernel support 2021-04-26 08:25:24 -07:00
crash_save_regs.S RISC-V: Add kdump support 2021-04-26 08:25:23 -07:00
efi-header.S RISC-V: Add PE/COFF header for EFI stub 2020-10-02 14:31:16 -07:00
efi.c RISC-V: Add EFI runtime services 2020-10-02 14:31:28 -07:00
entry.S cpu-to-thread_info update for v5.16-rc1 2021-11-01 17:00:05 -07:00
fpu.S riscv: abstract out CSR names for supervisor vs machine mode 2019-11-05 09:20:42 -08:00
ftrace.c ftrace: Cleanup ftrace_dyn_arch_init() 2021-10-08 19:41:39 -04:00
head.h RISC-V: enable XIP 2021-04-26 08:31:28 -07:00
head.S RISC-V Patches for the 5.16 Merge Window, Part 1 2021-11-13 09:15:42 -08:00
image-vars.h arch/riscv:fix typo in a comment in arch/riscv/kernel/image-vars.h 2021-02-18 23:18:00 -08:00
irq.c RISC-V: Remove do_IRQ() function 2020-06-09 19:11:24 -07:00
jump_label.c riscv: Add jump-label implementation 2020-07-30 11:37:43 -07:00
kexec_relocate.S riscv: Introduce structure that group all variables regarding kernel mapping 2021-07-05 18:04:00 -07:00
kgdb.c riscv: Fix "no previous prototype" compile warning in kgdb.c file 2020-07-09 20:09:30 -07:00
machine_kexec.c RISC-V Patches for the 5.14 Merge Window, Part 1 2021-07-09 10:36:29 -07:00
Makefile riscv: kexec: do not add '-mno-relax' flag if compiler doesn't support it 2021-08-12 07:16:52 -07:00
mcount-dyn.S riscv: Using PATCHABLE_FUNCTION_ENTRY instead of MCOUNT 2021-01-14 15:09:05 -08:00
mcount.S riscv: Workaround mcount name prior to clang-13 2021-04-26 08:25:01 -07:00
module-sections.c riscv: add missing header file includes 2019-10-28 00:46:01 -07:00
module.c riscv: module: Create module allocations without exec permissions 2021-04-26 08:25:15 -07:00
patch.c riscv: Fixup compile error BUILD_BUG_ON failed 2021-01-14 15:09:01 -08:00
perf_callchain.c riscv: Make stack walk callback consistent with generic code 2020-11-20 18:53:38 -08:00
perf_event.c riscv: perf_event: Make some funciton static 2020-05-11 13:48:19 -07:00
perf_regs.c perf/arch: Remove perf_sample_data::regs_user_copy 2020-11-09 18:12:34 +01:00
process.c riscv: Turn has_fpu into a static key if FPU=y 2021-05-25 22:56:57 -07:00
ptrace.c riscv: Ensure the value of FP registers in the core dump file is up to date 2021-08-24 20:54:10 -07:00
reset.c riscv: set default pm_power_off to NULL 2021-10-04 14:16:57 -07:00
riscv_ksyms.c riscv: provide memmove implementation 2020-12-10 17:27:54 -08:00
sbi.c RISC-V Patches for the 5.13 Merge Window, Part 1 2021-05-06 09:24:18 -07:00
setup.c memblock: use memblock_free for freeing virtual pointers 2021-11-06 13:30:41 -07:00
signal.c riscv: Turn has_fpu into a static key if FPU=y 2021-05-25 22:56:57 -07:00
smp.c irq: riscv: perform irqentry in entry code 2021-10-26 10:13:29 +01:00
smpboot.c sched/core: Initialize the idle task with preemption disabled 2021-05-12 13:01:45 +02:00
soc.c riscv: Fix builtin DTB handling 2021-01-07 19:00:50 -08:00
stacktrace.c sched: Add wrapper for get_wchan() to keep task blocked 2021-10-15 11:25:14 +02:00
sys_riscv.c RISC-V: Don't allow write+exec only page mapping request in mmap 2020-06-18 17:28:53 -07:00
syscall_table.c riscv/vdso: Refactor asm/vdso.h 2021-10-02 13:42:23 -07:00
time.c RISC-V Patches for the 5.13 Merge Window, Part 1 2021-05-06 09:24:18 -07:00
traps_misaligned.c riscv: Unaligned load/store handling for M_MODE 2020-04-03 10:45:33 -07:00
traps.c trap: cleanup trap_init() 2021-09-08 11:50:27 -07:00
vdso.c riscv/vdso: Add support for time namespaces 2021-10-04 14:16:43 -07:00
vmlinux-xip.lds.S riscv: remove .text section size limitation for XIP 2021-10-26 14:31:15 -07:00
vmlinux.lds.S riscv: Move EXCEPTION_TABLE to RO_DATA segment 2021-09-10 23:59:48 -07:00