mirror of
git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
synced 2025-09-04 20:19:47 +08:00
6c9da387c8
The CRG(Clock and Reset Generator) block provides clock and reset signals for other modules in hi3519 soc. Signed-off-by: Jiancheng Xue <xuejiancheng@hisilicon.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
41 lines
1.3 KiB
C
41 lines
1.3 KiB
C
/*
|
|
* Copyright (c) 2015 HiSilicon Technologies Co., Ltd.
|
|
*
|
|
* This program is free software; you can redistribute it and/or modify
|
|
* it under the terms of the GNU General Public License as published by
|
|
* the Free Software Foundation; either version 2 of the License, or
|
|
* (at your option) any later version.
|
|
*
|
|
* This program is distributed in the hope that it will be useful,
|
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
* GNU General Public License for more details.
|
|
*
|
|
* You should have received a copy of the GNU General Public License
|
|
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
|
*/
|
|
|
|
#ifndef __DTS_HI3519_CLOCK_H
|
|
#define __DTS_HI3519_CLOCK_H
|
|
|
|
#define HI3519_FMC_CLK 1
|
|
#define HI3519_SPI0_CLK 2
|
|
#define HI3519_SPI1_CLK 3
|
|
#define HI3519_SPI2_CLK 4
|
|
#define HI3519_UART0_CLK 5
|
|
#define HI3519_UART1_CLK 6
|
|
#define HI3519_UART2_CLK 7
|
|
#define HI3519_UART3_CLK 8
|
|
#define HI3519_UART4_CLK 9
|
|
#define HI3519_PWM_CLK 10
|
|
#define HI3519_DMA_CLK 11
|
|
#define HI3519_IR_CLK 12
|
|
#define HI3519_ETH_PHY_CLK 13
|
|
#define HI3519_ETH_MAC_CLK 14
|
|
#define HI3519_ETH_MACIF_CLK 15
|
|
#define HI3519_USB2_BUS_CLK 16
|
|
#define HI3519_USB2_PORT_CLK 17
|
|
#define HI3519_USB3_CLK 18
|
|
|
|
#endif /* __DTS_HI3519_CLOCK_H */
|