mirror of
				git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
				synced 2025-09-04 20:19:47 +08:00 
			
		
		
		
	 4091af6b52
			
		
	
	
		4091af6b52
		
	
	
	
	
		
			
			Fix two missing function declarations by including the <plat/platsmp.h> file where they are defined. Fixes: arch/arm/plat-versatile/platsmp.c:35:6: warning: symbol 'versatile_secondary_init' was not declared. Should it be static? arch/arm/plat-versatile/platsmp.c:50:5: warning: symbol 'versatile_boot_secondary' was not declared. Should it be static? Cc: Liviu Dudau <liviu.dudau@arm.com> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
		
			
				
	
	
		
			94 lines
		
	
	
		
			2.1 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			94 lines
		
	
	
		
			2.1 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
 | |
|  *  linux/arch/arm/plat-versatile/platsmp.c
 | |
|  *
 | |
|  *  Copyright (C) 2002 ARM Ltd.
 | |
|  *  All Rights Reserved
 | |
|  *
 | |
|  * This program is free software; you can redistribute it and/or modify
 | |
|  * it under the terms of the GNU General Public License version 2 as
 | |
|  * published by the Free Software Foundation.
 | |
|  */
 | |
| #include <linux/init.h>
 | |
| #include <linux/errno.h>
 | |
| #include <linux/delay.h>
 | |
| #include <linux/device.h>
 | |
| #include <linux/jiffies.h>
 | |
| #include <linux/smp.h>
 | |
| 
 | |
| #include <asm/cacheflush.h>
 | |
| #include <asm/smp_plat.h>
 | |
| 
 | |
| #include <plat/platsmp.h>
 | |
| 
 | |
| /*
 | |
|  * Write pen_release in a way that is guaranteed to be visible to all
 | |
|  * observers, irrespective of whether they're taking part in coherency
 | |
|  * or not.  This is necessary for the hotplug code to work reliably.
 | |
|  */
 | |
| static void write_pen_release(int val)
 | |
| {
 | |
| 	pen_release = val;
 | |
| 	smp_wmb();
 | |
| 	sync_cache_w(&pen_release);
 | |
| }
 | |
| 
 | |
| static DEFINE_SPINLOCK(boot_lock);
 | |
| 
 | |
| void versatile_secondary_init(unsigned int cpu)
 | |
| {
 | |
| 	/*
 | |
| 	 * let the primary processor know we're out of the
 | |
| 	 * pen, then head off into the C entry point
 | |
| 	 */
 | |
| 	write_pen_release(-1);
 | |
| 
 | |
| 	/*
 | |
| 	 * Synchronise with the boot thread.
 | |
| 	 */
 | |
| 	spin_lock(&boot_lock);
 | |
| 	spin_unlock(&boot_lock);
 | |
| }
 | |
| 
 | |
| int versatile_boot_secondary(unsigned int cpu, struct task_struct *idle)
 | |
| {
 | |
| 	unsigned long timeout;
 | |
| 
 | |
| 	/*
 | |
| 	 * Set synchronisation state between this boot processor
 | |
| 	 * and the secondary one
 | |
| 	 */
 | |
| 	spin_lock(&boot_lock);
 | |
| 
 | |
| 	/*
 | |
| 	 * This is really belt and braces; we hold unintended secondary
 | |
| 	 * CPUs in the holding pen until we're ready for them.  However,
 | |
| 	 * since we haven't sent them a soft interrupt, they shouldn't
 | |
| 	 * be there.
 | |
| 	 */
 | |
| 	write_pen_release(cpu_logical_map(cpu));
 | |
| 
 | |
| 	/*
 | |
| 	 * Send the secondary CPU a soft interrupt, thereby causing
 | |
| 	 * the boot monitor to read the system wide flags register,
 | |
| 	 * and branch to the address found there.
 | |
| 	 */
 | |
| 	arch_send_wakeup_ipi_mask(cpumask_of(cpu));
 | |
| 
 | |
| 	timeout = jiffies + (1 * HZ);
 | |
| 	while (time_before(jiffies, timeout)) {
 | |
| 		smp_rmb();
 | |
| 		if (pen_release == -1)
 | |
| 			break;
 | |
| 
 | |
| 		udelay(10);
 | |
| 	}
 | |
| 
 | |
| 	/*
 | |
| 	 * now the secondary core is starting up let it run its
 | |
| 	 * calibrations, then wait for it to finish
 | |
| 	 */
 | |
| 	spin_unlock(&boot_lock);
 | |
| 
 | |
| 	return pen_release != -1 ? -ENOSYS : 0;
 | |
| }
 |