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		d86472ae8b
		
	
	
	
	
		
			
			This is like commit 3d3451124f3d ("mmc: sdhci-msm: Prefer asynchronous
probe") but applied to a whole pile of drivers.  This batch converts
the drivers that appeared to be around in the v5.4 timeframe.
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Link: https://lore.kernel.org/r/20200903162412.5.I2b630c4d40ff4ea61d5b30b8ccfe95890e257100@changeid
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
		
	
			
		
			
				
	
	
		
			357 lines
		
	
	
		
			7.9 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			357 lines
		
	
	
		
			7.9 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| // SPDX-License-Identifier: GPL-2.0-or-later
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| /* Copyright (C) 2019 ASPEED Technology Inc. */
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| /* Copyright (C) 2019 IBM Corp. */
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| 
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| #include <linux/clk.h>
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| #include <linux/delay.h>
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| #include <linux/device.h>
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| #include <linux/io.h>
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| #include <linux/mmc/host.h>
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| #include <linux/module.h>
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| #include <linux/of_address.h>
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| #include <linux/of.h>
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| #include <linux/of_platform.h>
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| #include <linux/platform_device.h>
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| #include <linux/spinlock.h>
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| 
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| #include "sdhci-pltfm.h"
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| 
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| #define ASPEED_SDC_INFO		0x00
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| #define   ASPEED_SDC_S1MMC8	BIT(25)
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| #define   ASPEED_SDC_S0MMC8	BIT(24)
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| 
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| struct aspeed_sdc {
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| 	struct clk *clk;
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| 	struct resource *res;
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| 
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| 	spinlock_t lock;
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| 	void __iomem *regs;
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| };
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| 
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| struct aspeed_sdhci {
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| 	struct aspeed_sdc *parent;
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| 	u32 width_mask;
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| };
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| 
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| static void aspeed_sdc_configure_8bit_mode(struct aspeed_sdc *sdc,
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| 					   struct aspeed_sdhci *sdhci,
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| 					   bool bus8)
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| {
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| 	u32 info;
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| 
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| 	/* Set/clear 8 bit mode */
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| 	spin_lock(&sdc->lock);
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| 	info = readl(sdc->regs + ASPEED_SDC_INFO);
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| 	if (bus8)
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| 		info |= sdhci->width_mask;
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| 	else
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| 		info &= ~sdhci->width_mask;
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| 	writel(info, sdc->regs + ASPEED_SDC_INFO);
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| 	spin_unlock(&sdc->lock);
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| }
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| 
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| static void aspeed_sdhci_set_clock(struct sdhci_host *host, unsigned int clock)
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| {
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| 	struct sdhci_pltfm_host *pltfm_host;
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| 	unsigned long parent;
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| 	int div;
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| 	u16 clk;
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| 
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| 	pltfm_host = sdhci_priv(host);
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| 	parent = clk_get_rate(pltfm_host->clk);
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| 
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| 	sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL);
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| 
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| 	if (clock == 0)
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| 		return;
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| 
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| 	if (WARN_ON(clock > host->max_clk))
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| 		clock = host->max_clk;
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| 
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| 	for (div = 2; div < 256; div *= 2) {
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| 		if ((parent / div) <= clock)
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| 			break;
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| 	}
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| 	div >>= 1;
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| 
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| 	clk = div << SDHCI_DIVIDER_SHIFT;
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| 
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| 	sdhci_enable_clk(host, clk);
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| }
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| 
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| static unsigned int aspeed_sdhci_get_max_clock(struct sdhci_host *host)
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| {
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| 	if (host->mmc->f_max)
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| 		return host->mmc->f_max;
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| 
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| 	return sdhci_pltfm_clk_get_max_clock(host);
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| }
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| 
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| static void aspeed_sdhci_set_bus_width(struct sdhci_host *host, int width)
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| {
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| 	struct sdhci_pltfm_host *pltfm_priv;
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| 	struct aspeed_sdhci *aspeed_sdhci;
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| 	struct aspeed_sdc *aspeed_sdc;
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| 	u8 ctrl;
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| 
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| 	pltfm_priv = sdhci_priv(host);
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| 	aspeed_sdhci = sdhci_pltfm_priv(pltfm_priv);
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| 	aspeed_sdc = aspeed_sdhci->parent;
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| 
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| 	/* Set/clear 8-bit mode */
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| 	aspeed_sdc_configure_8bit_mode(aspeed_sdc, aspeed_sdhci,
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| 				       width == MMC_BUS_WIDTH_8);
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| 
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| 	/* Set/clear 1 or 4 bit mode */
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| 	ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
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| 	if (width == MMC_BUS_WIDTH_4)
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| 		ctrl |= SDHCI_CTRL_4BITBUS;
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| 	else
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| 		ctrl &= ~SDHCI_CTRL_4BITBUS;
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| 	sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
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| }
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| 
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| static u32 aspeed_sdhci_readl(struct sdhci_host *host, int reg)
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| {
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| 	u32 val = readl(host->ioaddr + reg);
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| 
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| 	if (unlikely(reg == SDHCI_PRESENT_STATE) &&
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| 	    (host->mmc->caps2 & MMC_CAP2_CD_ACTIVE_HIGH))
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| 		val ^= SDHCI_CARD_PRESENT;
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| 
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| 	return val;
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| }
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| 
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| static const struct sdhci_ops aspeed_sdhci_ops = {
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| 	.read_l = aspeed_sdhci_readl,
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| 	.set_clock = aspeed_sdhci_set_clock,
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| 	.get_max_clock = aspeed_sdhci_get_max_clock,
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| 	.set_bus_width = aspeed_sdhci_set_bus_width,
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| 	.get_timeout_clock = sdhci_pltfm_clk_get_max_clock,
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| 	.reset = sdhci_reset,
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| 	.set_uhs_signaling = sdhci_set_uhs_signaling,
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| };
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| 
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| static const struct sdhci_pltfm_data aspeed_sdhci_pdata = {
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| 	.ops = &aspeed_sdhci_ops,
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| 	.quirks = SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN,
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| };
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| 
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| static inline int aspeed_sdhci_calculate_slot(struct aspeed_sdhci *dev,
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| 					      struct resource *res)
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| {
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| 	resource_size_t delta;
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| 
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| 	if (!res || resource_type(res) != IORESOURCE_MEM)
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| 		return -EINVAL;
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| 
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| 	if (res->start < dev->parent->res->start)
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| 		return -EINVAL;
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| 
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| 	delta = res->start - dev->parent->res->start;
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| 	if (delta & (0x100 - 1))
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| 		return -EINVAL;
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| 
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| 	return (delta / 0x100) - 1;
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| }
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| 
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| static int aspeed_sdhci_probe(struct platform_device *pdev)
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| {
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| 	struct sdhci_pltfm_host *pltfm_host;
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| 	struct aspeed_sdhci *dev;
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| 	struct sdhci_host *host;
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| 	struct resource *res;
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| 	int slot;
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| 	int ret;
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| 
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| 	host = sdhci_pltfm_init(pdev, &aspeed_sdhci_pdata, sizeof(*dev));
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| 	if (IS_ERR(host))
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| 		return PTR_ERR(host);
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| 
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| 	pltfm_host = sdhci_priv(host);
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| 	dev = sdhci_pltfm_priv(pltfm_host);
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| 	dev->parent = dev_get_drvdata(pdev->dev.parent);
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| 
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| 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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| 	slot = aspeed_sdhci_calculate_slot(dev, res);
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| 
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| 	if (slot < 0)
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| 		return slot;
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| 	else if (slot >= 2)
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| 		return -EINVAL;
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| 
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| 	dev_info(&pdev->dev, "Configuring for slot %d\n", slot);
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| 	dev->width_mask = !slot ? ASPEED_SDC_S0MMC8 : ASPEED_SDC_S1MMC8;
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| 
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| 	sdhci_get_of_property(pdev);
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| 
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| 	pltfm_host->clk = devm_clk_get(&pdev->dev, NULL);
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| 	if (IS_ERR(pltfm_host->clk))
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| 		return PTR_ERR(pltfm_host->clk);
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| 
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| 	ret = clk_prepare_enable(pltfm_host->clk);
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| 	if (ret) {
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| 		dev_err(&pdev->dev, "Unable to enable SDIO clock\n");
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| 		goto err_pltfm_free;
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| 	}
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| 
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| 	ret = mmc_of_parse(host->mmc);
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| 	if (ret)
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| 		goto err_sdhci_add;
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| 
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| 	ret = sdhci_add_host(host);
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| 	if (ret)
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| 		goto err_sdhci_add;
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| 
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| 	return 0;
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| 
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| err_sdhci_add:
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| 	clk_disable_unprepare(pltfm_host->clk);
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| err_pltfm_free:
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| 	sdhci_pltfm_free(pdev);
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| 	return ret;
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| }
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| 
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| static int aspeed_sdhci_remove(struct platform_device *pdev)
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| {
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| 	struct sdhci_pltfm_host *pltfm_host;
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| 	struct sdhci_host *host;
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| 	int dead = 0;
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| 
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| 	host = platform_get_drvdata(pdev);
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| 	pltfm_host = sdhci_priv(host);
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| 
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| 	sdhci_remove_host(host, dead);
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| 
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| 	clk_disable_unprepare(pltfm_host->clk);
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| 
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| 	sdhci_pltfm_free(pdev);
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| 
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| 	return 0;
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| }
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| 
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| static const struct of_device_id aspeed_sdhci_of_match[] = {
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| 	{ .compatible = "aspeed,ast2400-sdhci", },
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| 	{ .compatible = "aspeed,ast2500-sdhci", },
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| 	{ .compatible = "aspeed,ast2600-sdhci", },
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| 	{ }
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| };
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| 
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| static struct platform_driver aspeed_sdhci_driver = {
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| 	.driver		= {
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| 		.name	= "sdhci-aspeed",
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| 		.probe_type = PROBE_PREFER_ASYNCHRONOUS,
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| 		.of_match_table = aspeed_sdhci_of_match,
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| 	},
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| 	.probe		= aspeed_sdhci_probe,
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| 	.remove		= aspeed_sdhci_remove,
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| };
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| 
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| static int aspeed_sdc_probe(struct platform_device *pdev)
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| 
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| {
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| 	struct device_node *parent, *child;
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| 	struct aspeed_sdc *sdc;
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| 	int ret;
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| 
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| 	sdc = devm_kzalloc(&pdev->dev, sizeof(*sdc), GFP_KERNEL);
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| 	if (!sdc)
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| 		return -ENOMEM;
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| 
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| 	spin_lock_init(&sdc->lock);
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| 
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| 	sdc->clk = devm_clk_get(&pdev->dev, NULL);
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| 	if (IS_ERR(sdc->clk))
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| 		return PTR_ERR(sdc->clk);
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| 
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| 	ret = clk_prepare_enable(sdc->clk);
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| 	if (ret) {
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| 		dev_err(&pdev->dev, "Unable to enable SDCLK\n");
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| 		return ret;
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| 	}
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| 
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| 	sdc->res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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| 	sdc->regs = devm_ioremap_resource(&pdev->dev, sdc->res);
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| 	if (IS_ERR(sdc->regs)) {
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| 		ret = PTR_ERR(sdc->regs);
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| 		goto err_clk;
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| 	}
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| 
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| 	dev_set_drvdata(&pdev->dev, sdc);
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| 
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| 	parent = pdev->dev.of_node;
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| 	for_each_available_child_of_node(parent, child) {
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| 		struct platform_device *cpdev;
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| 
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| 		cpdev = of_platform_device_create(child, NULL, &pdev->dev);
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| 		if (!cpdev) {
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| 			of_node_put(child);
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| 			ret = -ENODEV;
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| 			goto err_clk;
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| 		}
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| 	}
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| 
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| 	return 0;
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| 
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| err_clk:
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| 	clk_disable_unprepare(sdc->clk);
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| 	return ret;
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| }
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| 
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| static int aspeed_sdc_remove(struct platform_device *pdev)
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| {
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| 	struct aspeed_sdc *sdc = dev_get_drvdata(&pdev->dev);
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| 
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| 	clk_disable_unprepare(sdc->clk);
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| 
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| 	return 0;
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| }
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| 
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| static const struct of_device_id aspeed_sdc_of_match[] = {
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| 	{ .compatible = "aspeed,ast2400-sd-controller", },
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| 	{ .compatible = "aspeed,ast2500-sd-controller", },
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| 	{ .compatible = "aspeed,ast2600-sd-controller", },
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| 	{ }
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| };
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| 
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| MODULE_DEVICE_TABLE(of, aspeed_sdc_of_match);
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| 
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| static struct platform_driver aspeed_sdc_driver = {
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| 	.driver		= {
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| 		.name	= "sd-controller-aspeed",
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| 		.probe_type = PROBE_PREFER_ASYNCHRONOUS,
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| 		.pm	= &sdhci_pltfm_pmops,
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| 		.of_match_table = aspeed_sdc_of_match,
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| 	},
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| 	.probe		= aspeed_sdc_probe,
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| 	.remove		= aspeed_sdc_remove,
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| };
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| 
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| static int __init aspeed_sdc_init(void)
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| {
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| 	int rc;
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| 
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| 	rc = platform_driver_register(&aspeed_sdhci_driver);
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| 	if (rc < 0)
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| 		return rc;
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| 
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| 	rc = platform_driver_register(&aspeed_sdc_driver);
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| 	if (rc < 0)
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| 		platform_driver_unregister(&aspeed_sdhci_driver);
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| 
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| 	return rc;
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| }
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| module_init(aspeed_sdc_init);
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| 
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| static void __exit aspeed_sdc_exit(void)
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| {
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| 	platform_driver_unregister(&aspeed_sdc_driver);
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| 	platform_driver_unregister(&aspeed_sdhci_driver);
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| }
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| module_exit(aspeed_sdc_exit);
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| 
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| MODULE_DESCRIPTION("Driver for the ASPEED SD/SDIO/SDHCI Controllers");
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| MODULE_AUTHOR("Ryan Chen <ryan_chen@aspeedtech.com>");
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| MODULE_AUTHOR("Andrew Jeffery <andrew@aj.id.au>");
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| MODULE_LICENSE("GPL");
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