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2c50a570e9
This patch was triggered by a remark from Russell that
introducing a call to the waituart (needed to fix debug prints
on the Qualcomm platforms) was dangerous because in some cases
this will involve waiting for a modem CTS (clear to send)
signal, and debug messages would maybe not work on platforms
with no modem connected to the UART port: they will just
hang waiting for the modem to assert CTS and this might never
happen.
Looking through all UART debug drivers implementing the waituart
macro I discovered that all users except two actually use this
macro to check if the UART is ready for TX, let's call this
TXRDY.
Only two debug UART drivers actually check for CTS:
- arch/arm/include/debug/8250.S
- arch/arm/include/debug/tegra.S
The former is very significant since the 8250 is possibly
the most common UART on the planet.
We have the following problem: the semantics of waituart are
ambiguous making it dangerous to introduce the macro to debug
code fixing debug prints for Qualcomm. To start to pry this
problem apart, this patch does the following:
- Convert all debug UART drivers to define two macros:
- waituartcts with the clear semantic to wait for CTS
to be asserted
- waituarttxrdy with the clear semantic to wait for the TX
capability of the UART to be ready
- When doing this take care to assign the right function to
each drivers macro, so they now do exactly the above.
- Update the three sites in the kernel invoking the waituart
macro to call waituartcts/waituarttxrdy in sequence, so that
the functional impact on the kernel should be zero.
After this we can start to change the code sites using this
code to do the right thing.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
44 lines
1.1 KiB
ArmAsm
44 lines
1.1 KiB
ArmAsm
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (C) STMicroelectronics SA 2017 - All Rights Reserved
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* Author: Gerald Baeza <gerald.baeza@st.com> for STMicroelectronics.
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*/
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#ifdef CONFIG_STM32F4_DEBUG_UART
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#define STM32_USART_SR_OFF 0x00
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#define STM32_USART_TDR_OFF 0x04
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#endif
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#if defined(CONFIG_STM32F7_DEBUG_UART) || defined(CONFIG_STM32H7_DEBUG_UART) || \
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defined(CONFIG_STM32MP1_DEBUG_UART)
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#define STM32_USART_SR_OFF 0x1C
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#define STM32_USART_TDR_OFF 0x28
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#endif
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#define STM32_USART_TC (1 << 6) /* Tx complete */
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#define STM32_USART_TXE (1 << 7) /* Tx data reg empty */
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.macro addruart, rp, rv, tmp
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ldr \rp, =CONFIG_DEBUG_UART_PHYS @ physical base
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ldr \rv, =CONFIG_DEBUG_UART_VIRT @ virt base
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.endm
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.macro senduart,rd,rx
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strb \rd, [\rx, #STM32_USART_TDR_OFF]
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.endm
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.macro waituartcts,rd,rx
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.endm
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.macro waituarttxrdy,rd,rx
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1001: ldr \rd, [\rx, #(STM32_USART_SR_OFF)] @ Read Status Register
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tst \rd, #STM32_USART_TXE @ TXE = 1 = tx empty
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beq 1001b
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.endm
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.macro busyuart,rd,rx
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1001: ldr \rd, [\rx, #(STM32_USART_SR_OFF)] @ Read Status Register
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tst \rd, #STM32_USART_TC @ TC = 1 = tx complete
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beq 1001b
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.endm
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