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f3e25911a4
Add support for PCIe controller in J721E SoC. The controller uses the
Cadence PCIe core programmed by pcie-cadence*.c. The PCIe controller
will work in both host mode and device mode.
Some of the features of the controller are:
*) Supports both RC mode and EP mode
*) Supports MSI and MSI-X support
*) Supports upto GEN3 speed mode
*) Supports SR-IOV capability
*) Ability to route all transactions via SMMU (support will be added
in a later patch).
Link: https://lore.kernel.org/r/20200722110317.4744-14-kishon@ti.com
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
7 lines
280 B
Makefile
7 lines
280 B
Makefile
# SPDX-License-Identifier: GPL-2.0
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obj-$(CONFIG_PCIE_CADENCE) += pcie-cadence.o
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obj-$(CONFIG_PCIE_CADENCE_HOST) += pcie-cadence-host.o
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obj-$(CONFIG_PCIE_CADENCE_EP) += pcie-cadence-ep.o
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obj-$(CONFIG_PCIE_CADENCE_PLAT) += pcie-cadence-plat.o
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obj-$(CONFIG_PCI_J721E) += pci-j721e.o
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