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e31cf2f4ca
Patch series "mm: consolidate definitions of page table accessors", v2.
The low level page table accessors (pXY_index(), pXY_offset()) are
duplicated across all architectures and sometimes more than once. For
instance, we have 31 definition of pgd_offset() for 25 supported
architectures.
Most of these definitions are actually identical and typically it boils
down to, e.g.
static inline unsigned long pmd_index(unsigned long address)
{
return (address >> PMD_SHIFT) & (PTRS_PER_PMD - 1);
}
static inline pmd_t *pmd_offset(pud_t *pud, unsigned long address)
{
return (pmd_t *)pud_page_vaddr(*pud) + pmd_index(address);
}
These definitions can be shared among 90% of the arches provided
XYZ_SHIFT, PTRS_PER_XYZ and xyz_page_vaddr() are defined.
For architectures that really need a custom version there is always
possibility to override the generic version with the usual ifdefs magic.
These patches introduce include/linux/pgtable.h that replaces
include/asm-generic/pgtable.h and add the definitions of the page table
accessors to the new header.
This patch (of 12):
The linux/mm.h header includes <asm/pgtable.h> to allow inlining of the
functions involving page table manipulations, e.g. pte_alloc() and
pmd_alloc(). So, there is no point to explicitly include <asm/pgtable.h>
in the files that include <linux/mm.h>.
The include statements in such cases are remove with a simple loop:
for f in $(git grep -l "include <linux/mm.h>") ; do
sed -i -e '/include <asm\/pgtable.h>/ d' $f
done
Signed-off-by: Mike Rapoport <rppt@linux.ibm.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Brian Cain <bcain@codeaurora.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Chris Zankel <chris@zankel.net>
Cc: "David S. Miller" <davem@davemloft.net>
Cc: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: Greentime Hu <green.hu@gmail.com>
Cc: Greg Ungerer <gerg@linux-m68k.org>
Cc: Guan Xuetao <gxt@pku.edu.cn>
Cc: Guo Ren <guoren@kernel.org>
Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
Cc: Helge Deller <deller@gmx.de>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
Cc: Mark Salter <msalter@redhat.com>
Cc: Matthew Wilcox <willy@infradead.org>
Cc: Matt Turner <mattst88@gmail.com>
Cc: Max Filippov <jcmvbkbc@gmail.com>
Cc: Michael Ellerman <mpe@ellerman.id.au>
Cc: Michal Simek <monstr@monstr.eu>
Cc: Mike Rapoport <rppt@kernel.org>
Cc: Nick Hu <nickhu@andestech.com>
Cc: Paul Walmsley <paul.walmsley@sifive.com>
Cc: Richard Weinberger <richard@nod.at>
Cc: Rich Felker <dalias@libc.org>
Cc: Russell King <linux@armlinux.org.uk>
Cc: Stafford Horne <shorne@gmail.com>
Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Tony Luck <tony.luck@intel.com>
Cc: Vincent Chen <deanbo422@gmail.com>
Cc: Vineet Gupta <vgupta@synopsys.com>
Cc: Will Deacon <will@kernel.org>
Cc: Yoshinori Sato <ysato@users.sourceforge.jp>
Link: http://lkml.kernel.org/r/20200514170327.31389-1-rppt@kernel.org
Link: http://lkml.kernel.org/r/20200514170327.31389-2-rppt@kernel.org
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
171 lines
3.3 KiB
C
171 lines
3.3 KiB
C
// SPDX-License-Identifier: GPL-2.0
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// Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
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#include <linux/init.h>
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#include <linux/mm.h>
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#include <linux/module.h>
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#include <linux/sched.h>
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#include <asm/mmu_context.h>
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#include <asm/setup.h>
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/*
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* One C-SKY MMU TLB entry contain two PFN/page entry, ie:
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* 1VPN -> 2PFN
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*/
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#define TLB_ENTRY_SIZE (PAGE_SIZE * 2)
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#define TLB_ENTRY_SIZE_MASK (PAGE_MASK << 1)
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void flush_tlb_all(void)
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{
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tlb_invalid_all();
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}
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void flush_tlb_mm(struct mm_struct *mm)
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{
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#ifdef CONFIG_CPU_HAS_TLBI
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asm volatile("tlbi.asids %0"::"r"(cpu_asid(mm)));
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#else
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tlb_invalid_all();
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#endif
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}
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/*
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* MMU operation regs only could invalid tlb entry in jtlb and we
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* need change asid field to invalid I-utlb & D-utlb.
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*/
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#ifndef CONFIG_CPU_HAS_TLBI
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#define restore_asid_inv_utlb(oldpid, newpid) \
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do { \
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if (oldpid == newpid) \
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write_mmu_entryhi(oldpid + 1); \
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write_mmu_entryhi(oldpid); \
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} while (0)
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#endif
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void flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
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unsigned long end)
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{
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unsigned long newpid = cpu_asid(vma->vm_mm);
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start &= TLB_ENTRY_SIZE_MASK;
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end += TLB_ENTRY_SIZE - 1;
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end &= TLB_ENTRY_SIZE_MASK;
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#ifdef CONFIG_CPU_HAS_TLBI
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while (start < end) {
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asm volatile("tlbi.vas %0"::"r"(start | newpid));
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start += 2*PAGE_SIZE;
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}
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sync_is();
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#else
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{
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unsigned long flags, oldpid;
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local_irq_save(flags);
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oldpid = read_mmu_entryhi() & ASID_MASK;
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while (start < end) {
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int idx;
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write_mmu_entryhi(start | newpid);
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start += 2*PAGE_SIZE;
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tlb_probe();
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idx = read_mmu_index();
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if (idx >= 0)
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tlb_invalid_indexed();
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}
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restore_asid_inv_utlb(oldpid, newpid);
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local_irq_restore(flags);
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}
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#endif
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}
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void flush_tlb_kernel_range(unsigned long start, unsigned long end)
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{
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start &= TLB_ENTRY_SIZE_MASK;
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end += TLB_ENTRY_SIZE - 1;
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end &= TLB_ENTRY_SIZE_MASK;
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#ifdef CONFIG_CPU_HAS_TLBI
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while (start < end) {
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asm volatile("tlbi.vaas %0"::"r"(start));
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start += 2*PAGE_SIZE;
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}
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sync_is();
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#else
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{
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unsigned long flags, oldpid;
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local_irq_save(flags);
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oldpid = read_mmu_entryhi() & ASID_MASK;
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while (start < end) {
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int idx;
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write_mmu_entryhi(start | oldpid);
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start += 2*PAGE_SIZE;
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tlb_probe();
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idx = read_mmu_index();
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if (idx >= 0)
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tlb_invalid_indexed();
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}
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restore_asid_inv_utlb(oldpid, oldpid);
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local_irq_restore(flags);
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}
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#endif
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}
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void flush_tlb_page(struct vm_area_struct *vma, unsigned long addr)
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{
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int newpid = cpu_asid(vma->vm_mm);
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addr &= TLB_ENTRY_SIZE_MASK;
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#ifdef CONFIG_CPU_HAS_TLBI
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asm volatile("tlbi.vas %0"::"r"(addr | newpid));
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sync_is();
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#else
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{
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int oldpid, idx;
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unsigned long flags;
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local_irq_save(flags);
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oldpid = read_mmu_entryhi() & ASID_MASK;
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write_mmu_entryhi(addr | newpid);
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tlb_probe();
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idx = read_mmu_index();
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if (idx >= 0)
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tlb_invalid_indexed();
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restore_asid_inv_utlb(oldpid, newpid);
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local_irq_restore(flags);
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}
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#endif
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}
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void flush_tlb_one(unsigned long addr)
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{
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addr &= TLB_ENTRY_SIZE_MASK;
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#ifdef CONFIG_CPU_HAS_TLBI
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asm volatile("tlbi.vaas %0"::"r"(addr));
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sync_is();
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#else
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{
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int oldpid, idx;
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unsigned long flags;
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local_irq_save(flags);
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oldpid = read_mmu_entryhi() & ASID_MASK;
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write_mmu_entryhi(addr | oldpid);
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tlb_probe();
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idx = read_mmu_index();
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if (idx >= 0)
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tlb_invalid_indexed();
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restore_asid_inv_utlb(oldpid, oldpid);
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local_irq_restore(flags);
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}
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#endif
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}
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EXPORT_SYMBOL(flush_tlb_one);
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