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67549b73f1
Document Imagination Technologies PowerVR Rogue GE7800 BNVC 15.5.1.64 present in Renesas R-Car R8A779A0 V3U SoC. Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by: Matt Coster <matt.coster@imgtec.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://patch.msgid.link/20251106212342.2771579-2-niklas.soderlund+renesas@ragnatech.se Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
188 lines
4.1 KiB
YAML
188 lines
4.1 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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# Copyright (c) 2023 Imagination Technologies Ltd.
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/gpu/img,powervr-rogue.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Imagination Technologies PowerVR and IMG Rogue GPUs
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maintainers:
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- Frank Binns <frank.binns@imgtec.com>
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properties:
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compatible:
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oneOf:
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- items:
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- enum:
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- renesas,r8a7796-gpu
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- renesas,r8a77961-gpu
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- const: img,img-gx6250
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- const: img,img-rogue
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- items:
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- enum:
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- renesas,r8a77965-gpu
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- renesas,r8a779a0-gpu
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- const: img,img-ge7800
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- const: img,img-rogue
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- items:
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- enum:
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- ti,am62-gpu
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- const: img,img-axe-1-16m
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# This deprecated element must be kept around to allow old kernels to
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# work with newer dts.
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- const: img,img-axe
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- const: img,img-rogue
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- items:
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- enum:
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- thead,th1520-gpu
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- const: img,img-bxm-4-64
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- const: img,img-rogue
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- items:
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- enum:
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- ti,j721s2-gpu
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- const: img,img-bxs-4-64
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- const: img,img-rogue
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# This legacy combination of compatible strings was introduced early on
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# before the more specific GPU identifiers were used.
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- items:
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- enum:
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- ti,am62-gpu
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- const: img,img-axe
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deprecated: true
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reg:
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maxItems: 1
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clocks:
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minItems: 1
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maxItems: 3
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clock-names:
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items:
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- const: core
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- const: mem
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- const: sys
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minItems: 1
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interrupts:
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maxItems: 1
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power-domains:
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minItems: 1
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maxItems: 2
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power-domain-names:
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items:
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- const: a
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- const: b
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minItems: 1
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dma-coherent: true
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resets:
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maxItems: 1
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required:
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- compatible
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- reg
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- clocks
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- clock-names
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- interrupts
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additionalProperties: false
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allOf:
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- if:
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properties:
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compatible:
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contains:
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enum:
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- ti,am62-gpu
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- ti,j721s2-gpu
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then:
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properties:
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clocks:
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maxItems: 1
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- if:
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properties:
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compatible:
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contains:
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enum:
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- img,img-ge7800
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- img,img-gx6250
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- thead,th1520-gpu
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then:
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properties:
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clocks:
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minItems: 3
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clock-names:
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minItems: 3
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- if:
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properties:
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compatible:
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contains:
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const: img,img-axe-1-16m
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then:
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properties:
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power-domains:
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maxItems: 1
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power-domain-names:
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maxItems: 1
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required:
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- power-domains
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- power-domain-names
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- if:
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properties:
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compatible:
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contains:
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enum:
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- img,img-bxs-4-64
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- img,img-ge7800
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- img,img-gx6250
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then:
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properties:
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power-domains:
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minItems: 2
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power-domain-names:
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minItems: 2
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required:
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- power-domains
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- power-domain-names
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- if:
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properties:
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compatible:
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contains:
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const: thead,th1520-gpu
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then:
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properties:
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power-domains:
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items:
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- description: The single, unified power domain for the GPU on the
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TH1520 SoC, integrating all internal IP power domains.
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power-domain-names: false
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required:
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- power-domains
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examples:
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- |
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/soc/ti,sci_pm_domain.h>
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gpu@fd00000 {
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compatible = "ti,am62-gpu", "img,img-axe-1-16m", "img,img-axe",
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"img,img-rogue";
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reg = <0x0fd00000 0x20000>;
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clocks = <&k3_clks 187 0>;
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clock-names = "core";
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interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
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power-domains = <&k3_pds 187 TI_SCI_PD_EXCLUSIVE>;
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power-domain-names = "a";
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};
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