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c414943119
This patch fixes all the sparse warnings in the octeontx driver. Some of these are just trivial type changes. However, some of the changes are non-trivial on little-endian hosts. Obviously the driver appears to be broken on either LE or BE as it was doing different things. I've taken the BE behaviour as the correct one. Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
147 lines
2.6 KiB
C
147 lines
2.6 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (C) 2016 Cavium, Inc.
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*/
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#ifndef __REQUEST_MANAGER_H
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#define __REQUEST_MANAGER_H
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#include "cpt_common.h"
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#define TIME_IN_RESET_COUNT 5
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#define COMPLETION_CODE_SIZE 8
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#define COMPLETION_CODE_INIT 0
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#define PENDING_THOLD 100
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#define MAX_SG_IN_CNT 12
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#define MAX_SG_OUT_CNT 13
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#define SG_LIST_HDR_SIZE 8
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#define MAX_BUF_CNT 16
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union ctrl_info {
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u32 flags;
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struct {
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#if defined(__BIG_ENDIAN_BITFIELD)
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u32 reserved0:26;
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u32 grp:3; /* Group bits */
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u32 dma_mode:2; /* DMA mode */
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u32 se_req:1;/* To SE core */
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#else
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u32 se_req:1; /* To SE core */
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u32 dma_mode:2; /* DMA mode */
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u32 grp:3; /* Group bits */
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u32 reserved0:26;
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#endif
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} s;
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};
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union opcode_info {
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u16 flags;
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struct {
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u8 major;
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u8 minor;
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} s;
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};
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struct cptvf_request {
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union opcode_info opcode;
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u16 param1;
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u16 param2;
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u16 dlen;
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};
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struct buf_ptr {
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u8 *vptr;
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dma_addr_t dma_addr;
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u16 size;
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};
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struct cpt_request_info {
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u8 incnt; /* Number of input buffers */
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u8 outcnt; /* Number of output buffers */
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u16 rlen; /* Output length */
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union ctrl_info ctrl; /* User control information */
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struct cptvf_request req; /* Request Information (Core specific) */
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bool may_sleep;
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struct buf_ptr in[MAX_BUF_CNT];
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struct buf_ptr out[MAX_BUF_CNT];
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void (*callback)(int, void *); /* Kernel ASYNC request callabck */
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void *callback_arg; /* Kernel ASYNC request callabck arg */
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};
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struct sglist_component {
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union {
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u64 len;
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struct {
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__be16 len0;
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__be16 len1;
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__be16 len2;
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__be16 len3;
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} s;
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} u;
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__be64 ptr0;
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__be64 ptr1;
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__be64 ptr2;
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__be64 ptr3;
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};
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struct cpt_info_buffer {
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struct cpt_vf *cptvf;
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unsigned long time_in;
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u8 extra_time;
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struct cpt_request_info *req;
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dma_addr_t dptr_baddr;
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u32 dlen;
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dma_addr_t rptr_baddr;
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dma_addr_t comp_baddr;
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u8 *in_buffer;
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u8 *out_buffer;
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u8 *gather_components;
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u8 *scatter_components;
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struct pending_entry *pentry;
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volatile u64 *completion_addr;
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volatile u64 *alternate_caddr;
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};
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/*
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* CPT_INST_S software command definitions
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* Words EI (0-3)
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*/
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union vq_cmd_word0 {
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u64 u64;
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struct {
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__be16 opcode;
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__be16 param1;
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__be16 param2;
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__be16 dlen;
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} s;
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};
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union vq_cmd_word3 {
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u64 u64;
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struct {
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#if defined(__BIG_ENDIAN_BITFIELD)
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u64 grp:3;
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u64 cptr:61;
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#else
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u64 cptr:61;
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u64 grp:3;
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#endif
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} s;
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};
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struct cpt_vq_command {
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union vq_cmd_word0 cmd;
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u64 dptr;
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u64 rptr;
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union vq_cmd_word3 cptr;
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};
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void vq_post_process(struct cpt_vf *cptvf, u32 qno);
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int process_request(struct cpt_vf *cptvf, struct cpt_request_info *req);
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#endif /* __REQUEST_MANAGER_H */
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