Xiaojie Yuan 87190edcf3 drm/amdgpu: add CGTT_GS_NGG_CLK_CTRL register to gc header ... gc 10.1.2 introduced this new register Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2019-08-02 10:30:40 -05:00
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gc_9_0_default.h	drm/amdgpu: remove some old gc 9.x registers	2017-12-13 17:28:08 -05:00
gc_9_0_offset.h	drm/amd/include: add define of TCP_EDC_CNT_NEW	2019-07-31 14:50:54 -05:00
gc_9_0_sh_mask.h	drm/amd/include: add bitfield define for EDC registers	2019-07-31 14:50:47 -05:00
gc_9_1_offset.h	drm/amdgpu: remove some old gc 9.x registers	2017-12-13 17:28:08 -05:00
gc_9_1_sh_mask.h	drm/amd/amdgpu: re-add missing GC 9.1 and SDMA0 4.1 sh_mask header files	2018-03-07 16:10:13 -05:00
gc_9_2_1_offset.h	drm/amd/include: Add ip header files for vega12.	2018-03-21 14:23:01 -05:00
gc_9_2_1_sh_mask.h	drm/amd/include: update the bitfield define for PF_MAX_REGION	2018-09-10 22:45:51 -05:00
gc_10_1_0_default.h	drm/amdgpu: add GC 10.1 register headers (v4)	2019-06-20 15:54:35 -05:00
gc_10_1_0_offset.h	drm/amdgpu: add CGTT_GS_NGG_CLK_CTRL register to gc header	2019-08-02 10:30:40 -05:00
gc_10_1_0_sh_mask.h	drm/amdgpu: add CGTT_GS_NGG_CLK_CTRL register to gc header	2019-08-02 10:30:40 -05:00