Pei Xiao cd57e43277 phy: freescale: fsl-samsung-hdmi: Limit PLL lock detection clock divider to valid range ... FIELD_PREP() checks that a value fits into the available bitfield, but the index div equals to 4,is out of range. which gcc complains about: In function ‘fsl_samsung_hdmi_phy_configure_pll_lock_det’, inlined from ‘fsl_samsung_hdmi_phy_configure’ at drivers/phy/freescale/phy-fsl-samsung-hdmi.c :470:2: ././include/linux/compiler_types.h:542:38: error: call to ‘__compiletime_assert_538’ declared with attribute error: FIELD_PREP: value too large for the field 542 | _compiletime_assert(condition, msg, __compiletime_assert_, __COUNTER__) | ^ ././include/linux/compiler_types.h:523:4: note: in definition of macro ‘__compiletime_assert’ 523 | prefix ## suffix(); | ^~~~~~ ././include/linux/compiler_types.h:542:2: note: in expansion of macro ‘_compiletime_assert’ 542 | _compiletime_assert(condition, msg, __compiletime_assert_, __COUNTER__) REG12_CK_DIV_MASK only two bit, limit div to range 0~3, so build error will fix. Fixes: d567679f2b ("phy: freescale: fsl-samsung-hdmi: Clean up fld_tg_code calculation") Signed-off-by: Pei Xiao <xiaopei01@kylinos.cn> Changlog: Reviewed-by: Adam Ford <aford173@gmail.com> Link: https://lore.kernel.org/r/tencent_6F503D43467AA99DD8CC59B8F645F0725B0A@qq.com Signed-off-by: Vinod Koul <vkoul@kernel.org>		2025-02-13 23:00:45 +05:30
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Kconfig	phy: freescale: imx8qm-hsio: Add i.MX8QM HSIO PHY driver support	2024-06-15 17:52:01 +05:30
Makefile	phy: freescale: imx8qm-hsio: Add i.MX8QM HSIO PHY driver support	2024-06-15 17:52:01 +05:30
phy-fsl-imx8-mipi-dphy.c	phy: freescale: phy-fsl-imx8-mipi-dphy: Fix alias name to use dashes	2024-02-07 11:19:40 +01:00
phy-fsl-imx8m-pcie.c	phy: freescale: imx8m-pcie: Do CMN_RST just before PHY PLL lock check	2024-10-21 23:18:29 +05:30
phy-fsl-imx8mq-usb.c	phy: fsl-imx8mq-usb: fix tuning parameter name	2024-08-04 22:12:26 +05:30
phy-fsl-imx8qm-hsio.c	phy: freescale: imx8qm-hsio: Include bitfield.h for FIELD_PREP	2024-06-20 21:56:11 +05:30
phy-fsl-imx8qm-lvds-phy.c	phy: Switch back to struct platform_driver::remove()	2024-10-17 20:33:03 +05:30
phy-fsl-lynx-28g.c	phy: Switch back to struct platform_driver::remove()	2024-10-17 20:33:03 +05:30
phy-fsl-samsung-hdmi.c	phy: freescale: fsl-samsung-hdmi: Limit PLL lock detection clock divider to valid range	2025-02-13 23:00:45 +05:30